Datasheet

-IOWR
(True IDE Mode – Except
Ultra DMA Protocol Active)
STOP
(True IDE Mode – Ultra DMA
Protocol Active)
The clocking shall occur on the negative to positive edge of the signal (trailing
edge).
In True IDE Mode, while Ultra DMA mode protocol is not active, this signal has
the same function as in PC Card I/O Mode. When Ultra DMA mode protocol is
supported, this signal must be negated before e ntering Ultra DMA mode protocol.
In True IDE Mode, while Ultra DMA mode protocol is active, the assertion of this
signal causes the termination of the Ultra DMA burst.
-OE
(PC Card Memory Mode)
-OE
(PC Card I/O Mode)
-ATA SEL
(True IDE Mode)
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This is an Output Enable strobe generated by the host interface. It is used to read
data from the CompactFlash Storage Card in Memory Mode and to read the CIS
and configuration registers.
In PC Card I/O Mode, this signal is used to read the CIS and configuration
registers.
To enable True IDE Mode this input should be grounded by the host.
READY
(PC Card Memory Mode)
-IREQ
(PC Card I/O Mode)
INTRQ
(True IDE Mode)
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In Memory Mode, this signal is s et high when the CompactFlash Storage Card is
ready to accept a new data transfer operation and is held low when the ca rd is
busy.
At power up and at Reset, th e READY signal is held low (busy) until the
CompactFlash Storage Card ha s c ompleted its power up or reset function. No
access of any type should be made to the CompactFlash Storage Card during
this time.
Note, however, that when a card is powered up and used with RESET
continuously disconnected or asserted, the Reset function of the RESET pin is
disabled. Consequently, the continuous assertion o f RESET from the application
of power shall not cause the READY signal to remain continuously in the b usy
state.
I/O Operation – After the CompactFlash Storage Card Card has been configured
for I/O operation, this signal is used as -Interrupt Request. This line is strobed low
to generate a pulse mode interrupt or held low for a level mode interrupt.
In True IDE Mode signal is the active hig h Interrupt Request to the host.
Signal Name Dir. Pin Description
-REG
(PC Card Memory Mode)
Attribute Memory Select
-REG
(PC Card I/O Mode)
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This signal is used during Memory Cycles to distinguish b etween Common
Memory and Register (Attribute) Memory a ccesses. High for Common Memory,
Low for Attribute Memory.
The signal shall also be active (low) during I/O Cycles when the I/O address is on
the Bus.
-DMACK
(True IDE Mode)
This is a DMA Acknowledge signal tha t is asserted by the host in response to
DMARQ to initiate DMA transfers.