Datasheet
T
T
T
S
S
S
3
3
3
2
2
2
M
M
M
L
L
L
D
D
D
6
6
6
4
4
4
V
V
V
6
6
6
F
F
F
5
5
5
184PIN DDR266 Unbuffered DIMM
256MB With 32Mx8 CL2.5
AC OPERATING CONDITIONS
Parameter Symbol Min Max
Input timing measurement reference level VREF V
Unit
Input High (Logic 1) Voltage, DQ, DQS and DM signals VIH(AC)
Output timing measurement reference level Vtt
VREF + 0.31 V
V
Input Low (Logic 0) Voltage, DQ, DQS and DM signals VIL(AC)
Output load condition See Load Circuit
VREF - 0.31 V
Input Differential Voltage, CK and /CK inputs VID(AC) 0.7
VDDQ + 0.6 V
INPUT/OUTPUT CAPACITANCE
(VDD = 2.5V, VDDQ = 2.5V,TA = 25°C, f = 1MHz)
Parameter Symbol
Input Crossing Point Voltage, CK and /CK inputs VIX(AC) 0.5*VDDQ - 0.2
Min Max Unit
0.5*VDDQ + 0.2 V
Note:
Input capacitance (A0~A12, BA0~BA1, /RAS, /CAS, /WE)
Input capacitance (CKE0)
Input capacitance (/CS0)
1. VIH(max)=4.2V. The overshoot voltage duration is <=3ns at VDD.
Input capacitance (CLK0, CLK1, CLK2)
Data and DQS input/output capacitance (DQ0~DQ63)
Input capacitance (DM0~DM7)
2. VIL(min)=-1.5V. The undershoot voltage duration is <=3ns at VSS
C
IN1
CIN2
C
IN3
3. VID is the magnitude of the difference between the input level on CK and the input on /CK
4. The Value of VIX is expected to equal 0.5*VDDQ of the transmitting device and must track variations in the DC
level of the same.
C
IN4
C
OUT
CIN5
49
AC OPERATING TEST CONDITIONS
(VDD=2.5V, VDDQ=2.5V, TA=0 to 70°C)
42
42
22
Parameter Value Unit
6
6
57
Note
Input reference voltage for Clock 0.5*VDDQ
50
50
25
8
V
8
pF
pF
Input signal maximum peak swing 1.5 V
pF
pF
pF
Input Levels (VIH/VIL) VREF+0.31/VREF-0.31 V
pF
ZO=50ohm
VTT=0.5*VDDQ
RT=50ohm
C
LOAD
=30pF
Output
Output Load circuit
VREF
=0.5*VDDQ
Transcend Information Inc.
7