Datasheet

Features
RoHS compliant products.
JEDEC standard 1.35V(1.28V~1.45V) Power supply
JEDEC standard 1.5V(1.425V~1.575V) Power supply
VDDQ=1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
Clock Freq: 800MHZ for 1600Mb/s/Pin.
Programmable CAS Latency: 5, 6, 7, 8, 9 ,10, 11
Programmable Additive Latency (Posted /CAS):
0,CL-2 or CL-1 clock
Programmable /CAS Write Latency (CWL)
= 8(DDR3-1600)
8 bit pre-fetch
Burst Length: 4, 8
Bi-directional Differential Data-Strobe
Internal calibration through ZQ pin
On Die Termination with ODT pin
Serial presence detect with EEPROM
On DIMM thermal Sensor
Asynchronous reset
Pin Identification
Symbol Function
A0~A14, BA0~BA2
Address/Bank input
DQ0~DQ63 Data Input / Output.
DQS0~DQS8 Data strobes
/DQS0~/DQS8 Differential Data strobes
CB0~CB7 DIMM ECC check bits
CK0, /CK0,CK1, /CK1
Clock Input. (Differential pair)
CKE0, CKE1 Clock Enable Input.
ODT0, ODT1 On-die termination control line
/CS0, /CS1 DIMM Rank Select Lines.
/RAS Row Address Strobe
/CAS Column Address Strobe
/WE Write Enable
DM0~DM8 Data masks/high data strobes
VDD Voltage power supply
VDDQ Voltage Power Supply for DQS
V
REF
DQ/ V
REF
CA Power Supply for Reference
VDDSPD SPD EEPROM Power Supply
SA0~SA1
I2C serial bus address select for
EEPROM
SCL I2C serial bus clock for EEPROM
SDA I2C serial bus data for EEPROM
VSS Ground
/RESET Set DRAMs Known State
VTT SDRAM I/O termination supply
NC No Connection
DDR3 Low Voltage ECC SO-DIMM is high-speed, low power memory
module that use DDR3 SDRAM in FBGA package and a 2048 bits serial
EEPROM on a 204-pin printed circuit board. DDR3 Low Voltage ECC
SO-DIMM is a Dual In-Line Memory Module and is intended for mounting
into 204-pin edge connector sockets.
Synchronous design allows precise cycle control with the use of system
clock. Data I/O transactions are possible on both edges of DQS. Range
of operation frequencies, programmable latencies allow the same device
to be useful for a variety of high bandwidth, high performance memory
system applications.
DDR3 Low Voltage ECC SO-DIMM

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