Datasheet

T
T
T
S
S
S
1
1
1
6
6
6
M
M
M
L
L
L
S
S
S
6
6
6
4
4
4
V
V
V
8
8
8
C
C
C
2
2
2
128MB 168PIN PC100 CL2
SDRAM DIMM With 8M X 16 3.3VOLT
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Refer to the individual component, not the whole module.
Parameter Symbol Value Unit Note
Min Max
CAS latency=3 10
CLK cycle time
CAS latency=2
tCC
10
1000 ns 1
CAS latency=3 6
CLK to valid
output delay
CAS latency=2
t
SAC
6
ns 1, 2
CAS latency=3 3
Output data
hold time
CAS latency=2
t
OH
3
ns 2
CLK high pulse width tCH 3 ns 3
CLK low pulse width tCL 3 ns 3
Input setup time tSS 2 ns 3
Input hold time tSH 1 ns 3
CLK to output in Low-Z tSLZ 1 ns 2
CAS latency=3 6
CLK to output
in Hi-Z
CAS latency=2
t
SHZ
6
ns
Note:
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5) ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)= 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Transcend information Inc.
9