Datasheet

J
J
J
M
M
M
3
3
3
6
6
6
6
6
6
S
S
S
6
6
6
4
4
4
3
3
3
A
A
A
-
-
-
7
7
7
5
5
5
512MB 168PIN PC133 CL3
SDRAM DIMM With 32M X 8 3.3VOLT

Transcend information Inc

AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Refer to the individual component, not the whole module.
Parameter Symbol Min Max Unit Note
CLK cycle time CAS latency=3 t
CC
7.5 1000
ns 1
CLK to valid output delay CAS latency=3 t
SAC
- 5.4 ns 1, 2
Output data hold time CAS latency=3 t
OH
2.7 - ns 2
CLK high pulse width t
CH
2.5 ns 3
CLK low pulse width t
CL
2.5 ns 3
Input setup time t
SS
1.5 ns 3
Input hold time t
SH
0.8 ns 3
CLK to output in Low-Z t
SLZ
1 ns 2
CLK to output in Hi-Z CAS latency=3 t
SHZ
5.4 ns
Note:
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf)= 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.