Datasheet

J
J
J
M
M
M
3
3
3
6
6
6
6
6
6
D
D
D
6
6
6
4
4
4
3
3
3
A
A
A
-
-
-
6
6
6
0
0
0
512MB 184 PIN DDR333 DDR
SDRAM DIMM With 32Mx8 2.5VOLT
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter Symbol Max. Unit Note
Operating current - One bank Active-Precharge;
tRC=tRCmin; tCK= tCK min
DQ, DM and DQS inputs changing twice per clock cycle;
Address and control inputs changing once per clock cycle
IDD0
1160 mA
Operating current - One bank Active-Read-Precharge; Burst=2;
tRC=tRC min; CL=2.5; tCK=tCK min; VIN=VREF fro DQ,DQS and DM
IDD1
1400 mA
Percharge power-down standby current; All banks idle; power –
down mode; CKE = <VIL(max); tCK= tCK min
VIN = VREF
for DQ, DQS and DM
IDD2P
48 mA
Precharge Floating standby current; CS# > =VIH(min);All banks idle;
CKE > = VIH(min); tCK=166Mhz for DDR333
Address and other control inputs changing once per clock cycle;
VIN = VREF for DQ, DQS and DM
IDD2F 400 mA
Active power - down standby current; one bank active; power-down mode; CKE<=
VIL (max); tCK = tCK min;
VIN = VREF for DQ, DQS and DM
IDD3P 560 mA
Active standby current; CS# >= VIH(min); CKE>=VIH(min);
one bank active; active - precharge; tRC=tRASmax; tCK = tCK min;
DQ, DQS and DM inputs changing twice per clock cycle; address and other control
inputs changing once per clock cycle
IDD3N 880 mA
Operating current - burst read; Burst length = 2; reads; continuous burst; One bank
active; address and control inputs changing once per clock cycle; CL=2.5 at tCK =
tCK min; 50% of data changing at every burst; lout = 0 mA
IDD4R 1800 mA
Operating current - burst write; Burst length = 2; writes; continuous burst; One bank
active address and control inputs changing once per clock cycle; CL=2.5 at tCK =
tCK min; DQ, DM and DQS inputs changing twice per clock cycle, 50% of input data
changing at every burst
IDD4W 1800 mA
Auto refresh current; tRC = tRFC(min)
IDD5 1880 mA
Self refresh current; CKE <= 0.2V;
IDD6 48 mA
Operating current - Four bank operation;
Four bank interleaving with BL=4
-Refer to the following page for detailed test condition
IDD7 3040 mA
Note:
1. These parameters depend on the cycle rate and these values are measured a cycle rate with the minimum
values of tCK and tRC
2. These parameters depend on the output loading. Specified values are obtained with the output open.
Transcend Information Inc.
6