Datasheet

Contents
Datasheet 7
Tables
1 Front Side Bus-to-Core Frequency Ratio ......................................................................................17
2 Front Side Bus Clock Frequency Select Truth Table for BSEL[1:0] ..............................................17
3 Voltage Identification Definition .....................................................................................................21
4 Front Side Bus Signal Groups.......................................................................................................23
5 Processor Absolute Maximum Ratings..........................................................................................24
6 Voltage and Current Specifications ...............................................................................................26
7 Front Side Bus Differential BCLK Specifications ...........................................................................28
8 AGTL+ Signal Group DC Specifications........................................................................................29
9 TAP and PWRGOOD Signal Group DC Specifications.................................................................29
10 Asynchronous GTL+ Signal Group DC Specifications ..................................................................30
11 SMBus Signal Group DC Specifications........................................................................................30
12 BSEL[1:0] and VID[4:0] DC Specifications....................................................................................31
13 AGTL+ Bus Voltage Definitions.....................................................................................................31
14 Front Side Bus Differential Clock Specifications ...........................................................................32
15 Front Side Bus Common Clock AC Specifications ........................................................................33
16 Front Side Bus Source Synchronous AC Specifications ...............................................................33
17 Miscellaneous Signals+ AC Specifications....................................................................................34
18 Front Side Bus AC Specifications (Reset Conditions)...................................................................35
19 TAP Signal Group AC Specifications ............................................................................................35
20 SMBus Signal Group AC Specifications........................................................................................35
21 BCLK Signal Quality Specifications...............................................................................................45
22 Ringback Specifications for AGTL+ and Asynchronous GTL+ Buffers .........................................46
23 Ringback Specifications for TAP Buffers.......................................................................................47
24 Source Synchronous (400 MHz) AGTL+ Signal Group Overshoot/Undershoot Tolerance...........53
25 Source Synchronous (200 MHz) AGTL+ Signal Group Overshoot/Undershoot Tolerance...........53
26 Common Clock (100 MHz) AGTL+ Signal Group Overshoot/Undershoot Tolerance....................54
27 Asynchronous GTL+, PWRGOOD, and TAP Signal Groups Overshoot/Undershoot Tolerance ..54
28 INT-mPGA Processor Package Dimensions .................................................................................59
29 Package Dynamic and Static Load Specifications ........................................................................62
30 Processor Mass.............................................................................................................................63
31 Processor Material Properties .......................................................................................................63
38 Pin Listing by Pin Name ................................................................................................................67
39 Pin Listing by Pin Number .............................................................................................................76
41 Signal Definitions...........................................................................................................................84
42 Processor Thermal Design Power.................................................................................................96
43 Power-On Configuration Option Pins ............................................................................................99
44 Processor Information ROM Format............................................................................................105
45 Read Byte SMBus Packet ...........................................................................................................107
46 Write Byte SMBus Packet ...........................................................................................................107
47 Write Byte SMBus Packet ...........................................................................................................108
48 Read Byte SMBus Packet ...........................................................................................................108
49 Send Byte SMBus PacketReceive Byte SMBus Packet..............................................................109
50 ARA SMBus Packet.....................................................................................................................109
51 SMBus Thermal Sensor Command Byte Bit Assignments..........................................................109
52 Thermal Reference Register Values ...........................................................................................110
53 SMBus Thermal Sensor Status Register.....................................................................................111
54 SMBus Thermal Sensor Configuration Register .........................................................................112
55 SMBus Thermal Sensor Conversion Rate Registers ..................................................................112