Datasheet

Intel® Xeon™ Processor with 512 KB L2 Cache
Datasheet 69
DP1# AE19
Common Clk
Input/Output
DP2# AC15
Common Clk
Input/Output
DP3# AE17
Common Clk
Input/Output
DRDY# E18
Common Clk
Input/Output
DSTBN0# Y21
Source Sync
Input/Output
DSTBN1# Y18
Source Sync
Input/Output
DSTBN2# Y15
Source Sync
Input/Output
DSTBN3# Y12
Source Sync
Input/Output
DSTBP0# Y20
Source Sync
Input/Output
DSTBP1# Y17
Source Sync
Input/Output
DSTBP2# Y14
Source Sync
Input/Output
DSTBP3# Y11
Source Sync
Input/Output
FERR# E27
Async GTL+
Output
GTLREF W23
Power/Other
Input
GTLREF W9
Power/Other
Input
GTLREF F23
Power/Other
Input
GTLREF F9
Power/Other
Input
HIT# E22
Common Clk
Input/Output
HITM# A23
Common Clk
Input/Output
IERR# E5
Async GTL+
Output
IGNNE# C26
Async GTL+
Input
INIT# D6
Async GTL+
Input
LINT0 B24
Async GTL+
Input
LINT1 G23
Async GTL+
Input
LOCK# A17
Common Clk
Input/Output
MCERR# D7
Common Clk
Input/Output
ODTEN B5
Power/Other
Input
PROCHOT# B25
Async GTL+
Output
PWRGOOD AB7
Async GTL+
Input
REQ0# B19
Source Sync
Input/Output
REQ1# B21
Source Sync
Input/Output
REQ2# C21
Source Sync
Input/Output
REQ3# C20
Source Sync
Input/Output
REQ4# B22
Source Sync
Input/Output
Reserved A1
Reserved
Reserved
Reserved A4
Reserved
Reserved
Reserved A15
Reserved
Reserved
Reserved A16
Reserved
Reserved
Reserved A26
Reserved
Reserved
Table 38. Pin Listing by Pin Name
Pin Name Pin No.
Signal
Buffer Type
Direction
Reserved B1
Reserved
Reserved
Reserved C5
Reserved
Reserved
Reserved D25
Reserved
Reserved
Reserved W3
Reserved
Reserved
Reserved Y3
Reserved
Reserved
Reserved Y27
Reserved
Reserved
Reserved Y28
Reserved
Reserved
Reserved AC1
Reserved
Reserved
Reserved AD1
Reserved
Reserved
Reserved AE4
Reserved
Reserved
Reserved AE15
Reserved
Reserved
Reserved AE16
Reserved
Reserved
RESET# Y8
Common Clk
Input
RS0# E21
Common Clk
Input
RS1# D22
Common Clk
Input
RS2# F21
Common Clk
Input
RSP# C6
Common Clk
Input
SKTOCC# A3
Power/Other
Output
SLP# AE6
Async GTL+
Input
SM_ALERT# AD28
SMBus
Output
SM_CLK AC28
SMBus
Input
SM_DAT AC29
SMBus
Input/Output
SM_EP_A0 AA29
SMBus
Input
SM_EP_A1 AB29
SMBus
Input
SM_EP_A2 AB28
SMBus
Input
SM_TS1_A0 AA28
SMBus
Input
SM_TS1_A1 Y29
SMBus
Input
SM_VCC AE28
Power/Other
SM_VCC AE29
Power/Other
SM_WP AD29
SMBus
Input
SMI# C27
Async GTL+
Input
STPCLK# D4
Async GTL+
Input
TCK E24
TAP
Input
TDI C24
TAP
Input
TDO E25
TAP
Output
TESTHI0 W6
Power/Other
Input
TESTHI1 W7
Power/Other
Input
TESTHI2 W8
Power/Other
Input
TESTHI3 Y6
Power/Other
Input
Table 38. Pin Listing by Pin Name
Pin Name Pin No.
Signal
Buffer Type
Direction
1