Data Sheet
Table Of Contents
- 5.User Manual
- Revision History
- Table List
- About This Document
- Table of Contents
- Chapter 1. Overview
- Chapter 2. Interfaces Description
- 2.1. Interfaces parameter definitions
- 2.2. Pin description
- 2.3. Interfaces detail description
- 2.3.1. Power supply interface
- 2.3.2. RGMII interfaces
- 2.3.3. SPDIF interface
- 2.3.4. Audio interface
- 2.3.5. USB interface
- 2.3.6. PCIe interface
- 2.3.7. MIPI DSI interface
- 2.3.8. HDMI interface
- 2.3.9. JTAG interface
- 2.3.10. SDIO interface
- 2.3.11. BLSP interface
- 2.3.12. Power on interface
- 2.3.13. Reset interface
- 2.3.14. Boot configuration interface
- 2.3.15. Debug UART interface
- 2.3.16. PWM
- 2.3.17. Sleep clock
- 2.3.18. SPMI
- 2.3.19. Antenna interface
- Chapter 3. Electrical Characteristics
- Appendix 1. Notices
- Appendix 2. Trademarks
- 5.User Manual_ Warning
Thundercomm TurboX C40x SOM Datasheet
- 30 -
3.4.2. SD card digital I/O characteristics
The SD card is powered by P2; the power is 1.8V and 2.95V.the following table shows the SD card digital I/O
characteristics:
Table 3-6. SD digital IO voltage performance (1.8V/2.95V)
Parameter Description Min Typical Max Units
VIH High-level input voltage 1.27V/1.84V - 2.0V/2.98V V
VIL Low-level input voltage -0.3 - 0.58/0.74 V
VHYS Schmitt hysteresis voltage 100 - - mV
RPULL-UP Pull-up resistance 10 K - 100K Ω
RPULL-DOWN Pull-down resistance 10 K - 100K Ω
RKEEPER-UP Keeper-up resistance 10 K - 100K Ω
RKEEPER-
DOWN
Keeper-down resistance 10 K - 100K Ω
VOH High-level output voltage 1.4/2.21 - - V
VOL Low-level output voltage 0/0 - 0.45/0.36 V
Table 3-7. SD standards and exceptions
Applicable standard Feature exceptions Device variations
Multi Media Card Host Specification, version 5.1 (JESD84-
B51 - JEDEC)
None
Timing specifications as
shown in the following
figures.
Secure Digital: Physical Layer Specification version 3.0 None
SDIO Card Specification version 2.0 None
Single data rate – SDR mode:
Figure 3-1. Secure Digital Interface Timing Diagram -SDR Mode
Double data rate – DDR mode:
Figure 3-2. Secure Digital Interface Timing Diagram – DDR Mode
nicholas.wang_thundercomm.com
2022-07-21 2:34:47 AM CST