Data Sheet

Thundercomm TurboX C40x SOM Datasheet
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2.3.11. BLSP interface
These GPIOs are available as BAM-based low-speed peripheral (BLSP) interface ports that can be configured
for UART, SPI, or I2C operation.
I2C is a two-wire bus that can be routed to multiple devices; each line of each bus is supplemented by a 2.2kΩ
pull-up resistor.
2-wire UART TX/Rx and I2C SDA/SCL ports can be used simultaneously.
Table 2-16. BLSP interface-1 definition
BLSP Number GPIO PIN Location Voltage Type
Description
Notes
SPI UART I2C
0
30 64 P3 IO MOSI TX -
31 65 P3 IO MISO RX -
32 66 P3 IO CS_N CTS_N SDA
33 67 P3 IO CLK RFR_N SCL
1
22 C23 P3 IO MOSI_A TX -
23 D23 P3 IO MISO_A RX -
24 C24 P3 IO CS_N_A CTS_N SDA
25 D24 P3 IO CLK_A RFR_N SCL
2
17 C26 P3 IO MOSI TX -
18 D26 P3 IO MISO RX -
19 C27 P3 IO CS_N CTS_N SDA
20 D27 P3 IO CLK RFR_N SCL
4
37 69 P3 IO MOSI - -
38 70 P3 IO MISO - -
117 D28 P3 IO CS_N - SDA
118 C29 P3 IO CLK - SCL
Table 2-17. BLSP interface-2 definition
BLSP Number GPIO PIN Location Voltage Type
Description
Notes
SPI UART I2C
5
26 22 P3 IO MOSI TX -
27 23 P3 IO MISO RX -
28 24 P3 IO CS_N CTS_N SDA
29 25 P3 IO CLK RFR_N SCL
44 113 P3 IO CS1_N - -
45 114 P3 IO CS2_N - -
46 115 P3 IO CS3_N - -
2.3.12. Power on interface
Dedicated PMIC circuits continuously monitor events that might trigger a power-on sequence. If an event
occurs, these circuits power on the IC, determine the device’s available power sources, enable the correct
source.
There are two events that will be triggered.
When a battery or other power supply is inserted and pulled down KPDPWR_N to ground up to 1s and released,
SOM will be power on automatically.
Another power-on event, when pulled up PON_1 pin SOM will be power on automatically with the battery or
power supply inserted, and high-level triggered with a valid trigger range between 1.17 V to VPH_PWR.
nicholas.wang_thundercomm.com
2022-07-21 2:34:47 AM CST