Datasheet

XTR300
www.ti.com
SBOS336C JUNE 2005 REVISED JUNE 2011
POWER DISSIPATION
Power dissipation depends on power supply, signal, and load conditions. It is dominated by the power dissipation
of the output transistors of the OPA. For dc signals, power dissipation is equal to the product of output current,
I
OUT
and the output voltage across the conducting output transistor (V
S
V
OUT
).
It is very important to note that the temperature protection does not shut the part down in overtemperature
conditions, unless the EF
OT
pin is connected to the output enable pin OD; see the Driver Output Disable section.
The power that can be safely dissipated in the package is related to the ambient temperature and the heatsink
design and conditions. The QFN package with an exposed thermal pad is specifically designed to provide
excellent power dissipation, but board layout greatly influences the heat dissipation.
To appropriately determine the required heatsink area, required power dissipation should be calculated and the
relationship between power dissipation and thermal resistance should be considered to minimize overheat
conditions and allow for reliable long-term operation.
The heat sinking efficiency can be tested using the EF
OT
output signal. This output goes low at nominally +140°C
junction temperature (assume 6% tolerance). With full power dissipation (for example, maximum current into a
0Ω load), the ambient temperature can be slowly raised until the OT flag goes low. This flag would indicate the
minimum heat-sinking for the usable operation condition.
The recommended landing pattern for the QFN package is shown at the end of this data sheet.
Copyright © 20052011, Texas Instruments Incorporated 29