Datasheet

500W
C
F
10nF
ExternalFET
TypicalFilter
R
10kW
F
NOTE:Scalehasbeenchanged
fromFigure38andFigure39.
5mV/div
20 s/divm
XTR111
SBOS375C NOVEMBER 2006 REVISED JUNE 2011
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Figure 41. Output with Additional Filter
OUTPUT ERROR FLAG AND DISABLE INPUT INPUT VOLTAGE
The XTR111 has additional internal circuitry to detect The input voltage range for a given output current
an error in the output current. In case the controlled span is set by R
SET
according to the transfer function.
output current cannot flow due to a wire break, high Select a precise and low drift resistor for best
load resistance or the output voltage level performance, because resistor drift directly converts
approaching the positive supply, the error flag (EF), into drift of the output current. Careful layout must
an open drain logic output, pulls low. When used, this also minimize any series resistance with R
SET
and the
digital output requires external pull-up to logic high VIN reference point.
(the internal pull-up current is 2μA).
The input voltage is referred to the grounding point of
The output disable (OD) is a logic input with R
SET
. Therefore, this point should not be distorted
approximately 4μA of internal pull-up to 5V. The from other currents. Assuming a 5V full-scale input
XTR111 comes up with the output disabled until the signal for a 20mA output current, R
SET
is 2.5k. A
OD pin is pulled low. Logic high disables the output to resistance uncertainty of just 2.5 already degrades
zero output current. It can be used for calibration, the accuracy to below 0.1%.
power-on and power-off glitch reduction, and for
The linear input voltage range extends from 0V to
output multiplexing with other outputs connected to
12V, or 2.3V below the positive supply voltage
the same terminal pin.
(whichever is smaller). The lowest rated supply
Power-on while the output is disabled (OD = high) voltage accomodates an input voltage range of up to
cannot fully suppress output glitching. While the 5V. Potential clipping is not detected by an error
supply voltage passes through the range of 3V to 4V, signal; therefore, safe design guard banding is
internal circuits turn on. Additional capacitance recommended.
between pins VG and IS can suppress the glitch. The
Do not drive the input negative (referred to GND)
smallest glitch energy appears with the OD pin left
more than 300mV. Higher negative voltages turn on
open; for practical use, however, this pin can be
the internal protection diodes. Insert a resistor in
driven high through a 10k resistor before the 24V
series with the input if negative signals can occur
supply is applied, if logic voltage is available earlier.
eventually during power-on or -off or during other
Alternatively, an open drain driver can control this pin
transient conditions. Select a resistor value limiting
using the internal pull-up current. Pull-up to the
the possible current to 0.3mA. Higher currents are
internal regulator tends to increase the energy
non-destructive (see Absolute Maximum Ratings), but
because of the delay of the regulator voltage
they can produce output current glitches unless in
increase, again depending on the supply voltage rise
disable mode.
time for the first few volts.
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