Datasheet

XTR106
3
SBOS092A
www.ti.com
V
REG
V
IN
R
G
R
G
V
IN
I
RET
I
O
V
REF
5
V
REF
2.5
Lin Polarity
R
LIN
V+
B (Base)
E (Emitter)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
–
+
Power Supply, V+ (referenced to I
O
pin) .......................................... 40V
Input Voltage, V
IN
, V
IN
(referenced to I
RET
pin) ......................... 0V to V+
Storage Temperature Range ....................................... –55°C to +125°C
Lead Temperature (soldering, 10s) .............................................. +300°C
Output Current Limit ............................................................... Continuous
Junction Temperature ................................................................... +165°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ABSOLUTE MAXIMUM RATINGS
(1)
Top View DIP and SOIC
PIN CONFIGURATION
+
–
PACKAGE/ORDERING INFORMATION
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
For the most current package and ordering information, see
the Package Option Addendum at the end of this data sheet.