Datasheet

XIO2213B
www.ti.com SCPS210F –OCTOBER 2008–REVISED MAY 2013
4.73 TI Proprietary Register
This read/write TI proprietary register is located at offset E0h and controls TI proprietary functions. This
register must not be changed from the specified default state. This register shall only be reset by FRST.
PCI register offset: E0h
Register type: Read only, Read/Write
Default value: 00h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0
4.74 TI Proprietary Register
This read/write TI proprietary register is located at offset E2h and controls TI proprietary functions. This
register must not be changed from the specified default state. This register shall only be reset by FRST.
PCI register offset: E2h
Register type: Read/Write
Default value: 0000h
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4.75 TI Proprietary Register
This read/clear TI proprietary register is located at offset E4h and controls TI proprietary functions. This
register must not be changed from the specified default state.
PCI register offset: E4h
Register type: Read/Clear
Default value: 0000h
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Copyright © 2008–2013, Texas Instruments Incorporated Classic PCI Configuration Space 95
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