Datasheet

XIO2213B

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SCPS210F –OCTOBER 2008–REVISED MAY 2013

4.8 Header Type Register

This read-only register indicates that this function has a type 1 PCI header. Bit 7 of this register is 0b,

indicating that the bridge is a single-function device.

PCI register offset: 0Eh

Default value: 01h

BIT NUMBER 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 0 0 0 0 1

4.9 BIST Register

Since the bridge does not support a built-in self test (BIST), this read-only register returns the value of 00h

when read.

PCI register offset: 0Fh

Default value: 00h

BIT NUMBER 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 0 0 0 0 0

4.10 Device Control Base Address Register

This read/write register programs the memory base address that accesses the device control registers.

See Table 4-5 for a complete description of the register contents.

PCI register offset: 10h

Default value: 0000 0000h

BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Table 4-5. Device Control Base Address Register Description

BIT FIELD NAME ACCESS DESCRIPTION

31:12 ADDRESS R or RW Memory address. The memory address field for XIO2213B uses 20 read/write bits indicating

that 4096 bytes of memory space are required. While less than this is actually used, typical

systems will allocate this space on a 4K boundary. If the BAR0_EN bit (bit 5 at C8h) is 0,

these bits are read only and return zeros when read. If the BAR0_EN bit is 1, these bits are

read/write.

11:4 RSVD R Reserved. These bits are read only and return 00h when read.

3 PRE_FETCH R Prefetchable. This bit is read-only 0b indicating that this memory window is not prefetchable.

2:1 MEM_TYPE R Memory type. This field is read-only 00b indicating that this window can be located anywhere

in the 32-bit address space.

0 MEM_IND R Memory space indicator. This field returns 0b indicating that memory space is used.

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