Datasheet

XIO2213B
SCPS210F OCTOBER 2008REVISED MAY 2013
www.ti.com
4.68 TI Proprietary Register .................................................................................................... 91
4.69 TI Proprietary Register .................................................................................................... 91
4.70 Arbiter Control Register ................................................................................................... 92
4.71 Arbiter Request Mask Register .......................................................................................... 93
4.72 Arbiter Time-Out Status Register ........................................................................................ 94
4.73 TI Proprietary Register .................................................................................................... 95
4.74 TI Proprietary Register .................................................................................................... 95
4.75 TI Proprietary Register .................................................................................................... 95
5 PCIe Extended Configuration Space .................................................................................... 96
5.1 Advanced Error Reporting Capability ID Register ..................................................................... 96
5.2 Next Capability Offset/Capability Version Register ................................................................... 97
5.3 Uncorrectable Error Status Register .................................................................................... 97
5.4 Uncorrectable Error Mask Register ..................................................................................... 98
5.5 Uncorrectable Error Severity Register .................................................................................. 99
5.6 Correctable Error Status Register ..................................................................................... 101
5.7 Correctable Error Mask Register ....................................................................................... 102
5.8 Advanced Error Capabilities and Control Register .................................................................. 103
5.9 Header Log Register .................................................................................................... 103
5.10 Secondary Uncorrectable Error Status Register ..................................................................... 104
5.11 Secondary Uncorrectable Error Mask Register ...................................................................... 105
5.12 Secondary Uncorrectable Error Severity .............................................................................. 106
5.13 Secondary Error Capabilities and Control Register ................................................................. 107
5.14 Secondary Header Log Register ....................................................................................... 108
6 Memory-Mapped TI Proprietary Register Space ................................................................... 109
6.1 Device Control Map ID Register ....................................................................................... 109
6.2 Revision ID Register ..................................................................................................... 110
6.3 GPIO Control Register .................................................................................................. 110
6.4 GPIO Data Register ..................................................................................................... 111
6.5 Serial-Bus Data Register ................................................................................................ 112
6.6 Serial-Bus Word Address Register .................................................................................... 112
6.7 Serial-Bus Slave Address Register .................................................................................... 112
6.8 Serial-Bus Control and Status Register ............................................................................... 113
7 1394 OHCI PCI Configuration Space ................................................................................... 114
7.1 Vendor ID Register ...................................................................................................... 115
7.2 Device ID Register ....................................................................................................... 115
7.3 Command Register ...................................................................................................... 116
7.4 Status Register ........................................................................................................... 117
7.5 Class Code and Revision ID Registers ............................................................................... 118
7.6 Cache Line Size and Latency Timer Registers ...................................................................... 118
7.7 Header Type and BIST Registers ..................................................................................... 119
7.8 OHCI Base Address Register .......................................................................................... 119
7.9 TI Extension Base Address Register .................................................................................. 120
7.10 CIS Base Address Register ............................................................................................ 120
7.11 CIS Pointer Register ..................................................................................................... 121
7.12 Subsystem Vendor ID and Subsystem ID Registers ................................................................ 121
7.13 Power Management Capabilities Pointer Register .................................................................. 122
7.14 Interrupt Line and Interrupt Pin Registers ............................................................................ 122
7.15 Minimum Grant and Minimum Latency Registers ................................................................... 123
7.16 OHCI Control Register .................................................................................................. 123
7.17 Capability ID and Next Item Pointer Registers ....................................................................... 124
7.18 Power Management Capabilities Register ............................................................................ 124
7.19 Power Management Control and Status Register ................................................................... 125
7.20 Power Management Extension Registers ............................................................................ 125
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