Datasheet

XIO2213B
www.ti.com SCPS210F –OCTOBER 2008–REVISED MAY 2013
11.4 PCIe Differential Receiver Input Ranges
RXP and RXN
PARAMETER MIN NOM MAX UNIT COMMENTS
Each UI is 400 ps 300 ppm. UI does not account
UI Unit interval 399.88 400 400.12 ps
for SSC dictated variations
(1)
Differential input peak-to-peak
V
RX-DIFFp-p
0.175 1.200 V V
RX-DIFFp-p
= 2*|V
RXP
V
RXN
, |
(2)
voltage
The maximum interconnect media and transmitter
jitter that can be tolerated by the receiver is
T
RX-EYE
Minimum receiver eye width 0.4 UI
derived as T
RX-MAX-JITTER
= 1 T
RX-EYE
= 0.6 UI
(2)
(3)
Jitter is defined as the measurement variation of
the crossing points (V
RX-DIFFp-p
= 0 V) in relation
Maximum time between jitter to recovered TX UI. A recovered TX UI is
T
RX-EYE-MEDIAN-to-MAX-JITTER
median and maximum 0.3 UI calculated over 3500 consecutive UIs of sample
deviation from median data. Jitter is measured using all edges of the
250 consecutive UIs in the center of the 3500 UIs
used for calculating the TX UI.
(2) (3)
AC peak common-mode input V
RX-CM-ACp
= RMS(|V
RXP
+ V
RXN
|/2 V
RX-CM-DC
)
V
RX-CM-ACp
150 mV
voltage V
RX-CM-DC
= DC
(avg)
of |V
RXP
+ V
RXN
|/2
(2)
Measured over 50 MHz to 1.25 GHz with the P
RL
RX-DIFF
Differential return loss 10 dB and N lines biased at +300 mV and 300 mV,
respectively
(4)
Measured over 50 MHz to 1.25 GHz with the P
RL
RX-CM
Common-mode return loss 6 dB and N lines biased at +300 mV and 300 mV,
respectively
(4)
DC differential input
Z
RX-DIFF-DC
80 100 120 Ω
RX dc differential mode impedance
(4)
impedance
Required RXP as well as RXN dc impedance (50
Z
RX-DC
DC input impedance 40 50 60 Ω
}20% tolerance)
(2) (5)
Required RXP as well as RXN dc impedance
Powered down dc input
Z
RX-HIGH-IMP-D
200 k when the receiver terminations do not have
impedance
power
(6)
V
RX-IDLE-DET-DIFFp-p
= 2*|V
RXP
V
RXN
| measured at
V
RX-IDLE-DET-DIFFp-p
Electrical idle detect threshold 65 175 mV
the receiver package terminals
An unexpected electrical idle
Unexpected electrical idle (V
RX-DIFFp-p
< V
RX-IDLE-DET-DIFFp-p
) must be
T
RX-IDLE-DET-DIFF-ENTER-TIME
enter detect threshold 10 ms recognized no longer than
integration time T
RX-IDLE-DET-DIFF-ENTER-TIME
to signal an
unexpected idle condition.
(1) No test load is necessarily associated with this value.
(2) Specified at the measurement point and measured over any 250 consecutive UIs. A test load must be used as the RX device when
taking measurements. If the clocks to the RX and TX are not derived from the same reference clock, the TX UI recovered from 3500
consecutive UI is used as a reference for the eye diagram.
(3) A T
RX-EYE
= 0.40 UI provides for a total sum of 0.60 UI deterministic and random jitter budget for the transmitter and interconnect
collected any 250 consecutive UIs. The T
RX-EYE-MEDIAN-to-MAX-JITTER
specification ensures a jitter distribution in which the median and the
maximum deviation from the median is less than half of the total UI jitter budget collected over any 250 consecutive TX UIs. It must be
noted that the median is not the same as the mean. The jitter median describes the point in time where the number of jitter points on
either side is approximately equal as opposed to the averaged time value. If the clocks to the RX and TX are not derived from the same
reference clock, the TX UI recovered from 3500 consecutive UIs must be used as the reference for the eye diagram.
(4) The receiver input impedance results in a differential return loss greater than or equal to 15 dB with the P line biased to 300 mV and the
N line biased to 300 mV and a common-mode return loss greater than or equal to 6 dB (no bias required) over a frequency range of 50
MHz to 1.25 GHz. This input impedance requirement applies to all valid input levels. The reference impedance for return loss
measurements for is 50 to ground for both the P and N line (i.e., as measured by a vector network analyzer with 50- probes). The series
capacitors CTX is optional for the return loss measurement.
(5) Impedance during all link training status state machine (LTSSM) states. When transitioning from a PCIe reset to the detect state (the
initial state of the LTSSM) there is a 5-ms transition time before receiver termination values must be met on the unconfigured lane of a
port.
(6) The RX dc common-mode impedance that exists when no power is present or PCIe reset is asserted. This helps ensure that the
receiver detect circuit does not falsely assume a receiver is powered on when it is not. This term must be measured at 300 mV above
the RX ground.
Copyright © 2008–2013, Texas Instruments Incorporated Electrical Characteristics 193
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