Datasheet

XIO2213B

SCPS210F –OCTOBER 2008–REVISED MAY 2013

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8.10 GUID High Register

The GUID high register represents the upper quadlet in a 64-bit global unique ID (GUID), which maps to

the third quadlet in the Bus_Info_Block. This register contains node_vendor_ID and chip_ID_hi fields. This

EEPROM is detected, the contents of this register are loaded through the serial EEPROM interface. At

that point, the contents of this register cannot be changed. If no serial EEPROM is detected, the contents

of this register are loaded by the BIOS. At that point, the contents of this register cannot be changed. This

OHCI register offset: 24h

Default value: 0000 0000h

BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3

(1)

RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

(1) These bits are reset only by a global reset (GRST) or the internally generated power-on reset.

8.11 GUID Low Register

The GUID low register represents the lower quadlet in a 64-bit global unique ID (GUID), which maps to

chip_ID_lo in the Bus_Info_Block. This register initializes to 0000 0000h on a system (hardware) reset and

behaves identical to the GUID high register at OHCI offset 24h (see Section 8.10). This register is reset by

PERST, GRST, or the internally-generated power-on reset.

OHCI register offset: 28h

Default value: 0000 0000h

BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3

(1)

RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

(1) These bits are reset only by a global reset (GRST) or the internally generated power-on reset.

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