Datasheet

XIO2213B
SCPS210F –OCTOBER 2008–REVISED MAY 2013 www.ti.com
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7
(1)
6 5 4 3 2 1 0
RESET STATE 0 0 0 0 1 0 1 0 1 0 0 1 0 0 0 0
(1) These bits shall only be reset by a fundamental reset (FRST). FRST is asserted (low) whenever PERST or GRST is asserted.
126 1394 OHCI PCI Configuration Space Copyright © 2008–2013, Texas Instruments Incorporated
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