Datasheet
XIO2213B
SCPS210F –OCTOBER 2008–REVISED MAY 2013
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7 1394 OHCI PCI Configuration Space
The 1394 OHCI core is integrated as a PCI device behind the PCIe to PCI bridge. The configuration
header for the 1394b OHCI portion of the design is compliant with the PCI specification as a standard
header. Table 7-1 shows the configuration header that includes both the predefined portion of the
configuration space and the user-definable registers.
Since the 1394 OHCI configuration space is accessed over the bridge secondary PCI bus, PCIe type 1
configuration read and write transactions are required when accessing these registers. The 1394 OHCI
configuration register map is accessed as device number 0 and function number 0. Of course, the bus
number is determined by the value that is loaded into the secondary bus number field at offset 19h within
the PCIe configuration register map.
Sticky bits are reset by a fundamental reset (FRST). The remaining register bits are reset by a PCIe hot
reset, PERST, GRST, or the internally-generated power-on reset.
Table 7-1. 1394 OHCI Configuration Register Map
REGISTER NAME OFFSET
Device ID Vendor ID 00h
Status Command 04h
Class code Revision ID 08h
BIST Header type Latency timer Cache line size 0Ch
OHCI base address 10h
TI extension base address 14h
CIS base address 18h
Reserved 1Ch-27h
CIS pointer 28h
Subsystem ID
(1)
Subsystem vendor ID
(1)
2Ch
Reserved 30h
Reserved Power management capabilities 34h
pointer
Reserved 38h
Maximum latency
(1)
Minimum grant
(1)
Interrupt pin Interrupt line 3Ch
OHCI control 40h
Power management capabilities Next item pointer Capability ID 44h
Power management data PMCSR_BSE Power management control and status
(1)
48h
(reserved)
Reserved 4Ch-E7h
Multifunction select E8h
PCI PHY control
(1)
ECh
PCI miscellaneous configuration
(1)
F0h
Link enhancement control
(1)
F4h
Subsystem access
(1)
F8h
TI proprietary FCh
(1) This register shall only be reset by a fundamental reset (FRST). FRST is asserted (low) whenever PERST or GRST is asserted.
114 1394 OHCI PCI Configuration Space Copyright © 2008–2013, Texas Instruments Incorporated
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