Datasheet
Classic PCI Configuration Space
77
March 5 2007 − June 2011 SCPS154C
4.70 Arbiter Request Mask Register
The arbiter request mask register enables and disables support for requests from specific masters on the
secondary bus. The arbiter request mask register also controls if a request input is automatically masked on
an arbiter time-out. See Table 4−41 for a complete description of the register contents.
PCI register offset: DDh
Register type: Read/Write
Default value: 00h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0
Table 4−41. Arbiter Request Mask Register Description
BIT FIELD NAME ACCESS DESCRIPTION
7† ARB_TIMEOUT RW
Arbiter time-out. This bit enables the arbiter time-out feature. The arbiter time-out is defined as
the number of PCI clocks after the PCI bus has gone idle for a device to assert FRAME
before
the arbiter assumes the device will not respond.
0 = Arbiter time disabled (default)
1 = Arbiter time-out set to 16 PCI clocks
6† AUTO_MASK RW
Automatic request mask. This bit enables automatic request masking when an arbiter time-out
occurs.
0 = Automatic request masking disabled (default)
1 = Automatic request masking enabled
5:1† RSVD RW Reserved. These bits are reserved and must not be changed from their default value of 00000b.
0† OHCI_MASK RW
1394a OHCI mask. Setting this bit forces the internal arbiter to ignore requests signaled from the
1394a OHCI.
0 = Use 1394a OHCI request (default)
1 = Ignore 1394a OHCI request
†
These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
4.71 Arbiter Time-Out Status Register
The arbiter time-out status register contains the status of each request (request 5–0) time-out. The time-out
status bit for the respective request is set if the device did not assert FRAME
after the arbiter time-out value.
See Table 4−42 for a complete description of the register contents.
PCI register offset: DEh
Register type: Read/Clear
Default value: 00h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0
Table 4−42. Arbiter Time-Out Status Register Description
BIT FIELD NAME ACCESS DESCRIPTION
7:1 RSVD R Reserved. Returns 000 0000b when read.
0 OHCI_TO RCU
1394a OHCI request time-out status
0 = No time-out
1 = Time-out has occurred
Not Recommended for New Designs