Datasheet

Classic PCI Configuration Space
57
March 5 2007 − June 2011 SCPS154C
4.40 MSI Message Upper Address Register
This register contains the upper 32 bits of the address that a MSI message writes to when a serial IRQ is
detected. If this register contains 0000 0000h, then 32-bit addressing is used; otherwise, 64-bit addressing
is used.
PCI register offset: 68h
Register type: Read/Write
Default value: 0000 0000h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
NOTE: Enabling MSI messaging in the XIO2200A has no effect.
4.41 MSI Message Data Register
This register contains the data that software programmed the bridge to send when it send a MSI message.
See Table 4−23 for a complete description of the register contents.
PCI register offset: 6Ch
Register type: Read/Write
Default value: 0000h
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 4−23. MSI Message Data Register Description
BIT FIELD NAME ACCESS DESCRIPTION
15:4 MSG RW
System specific message. This field contains the portion of the message that the bridge forwards
unmodified.
3:0 MSG_NUM RW
Message number. This portion of the message field may be modified to contain the message
number is multiple messages are enable. The number of bits that are modifiable depends on the
number of messages enabled in the message control register.
1 message = No message data bits can be modified (default)
2 messages = Bit 0 can be modified
4 messages = Bits 1:0 can be modified
8 messages = Bits 2:0 can be modified
16 messages = Bits 3:0 can be modified
NOTE: Enabling MSI messaging in the XIO2200A has no effect.
4.42 Capability ID Register
This read-only register identifies the linked list item as the register for subsystem ID and subsystem vendor
ID capabilities. The register returns 0Dh when read.
PCI register offset: 80h
Register type: Read-only
Default value: 0Dh
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 1 1 0 1
Not Recommended for New Designs