Datasheet

Classic PCI Configuration Space

March 5 2007 − June 2011 SCPS154C

Table 4−1. PCI Express Configuration Register Map (Continued)

GPIO data† GPIO control† 0B4h

Reserved 0B8h−0BCh

Control and diagnostic register 0† 0C0h

Control and diagnostic register 1† 0C4h

Control and diagnostic register 2† 0C8h

Reserved 0CCh

Subsystem access† 0D0h

General control† 0D4h

Reserved TI proprietary† TI proprietary† TI proprietary† 0D8h

Reserved Arbiter time-out status Arbiter request mask† Arbiter control† 0DCh

TI proprietary† Reserved TI proprietary† 0E0h

Reserved TI proprietary 0E4h

Reserved 0E8h−0FCh

†

One or more bits in this register are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.

4.1 Vendor ID Register

This 16-bit read-only register contains the value 104Ch, which is the vendor ID assigned to Texas Instruments.

PCI register offset: 00h

Default value: 104Ch

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 1 0 0 0 0 0 1 0 0 1 1 0 0

4.2 Device ID Register

This 16-bit read-only register contains the value 8231h, which is the device ID assigned by TI for the bridge.

PCI register offset: 02h

Default value: 8231h

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESET STATE 1 0 0 0 0 0 1 0 0 0 1 1 0 0 0 1

Not Recommended for New Designs