Datasheet

1394 OHCI Memory-Mapped Register Space

160

March 5 2007 − June 2011SCPS154C

8.41 Asynchronous Context Command Pointer Register

The asynchronous context command pointer register contains a pointer to the address of the first descriptor

block that the controller accesses when software enables the context by setting bit 15 (run) in the

asynchronous context control register (see Section 8.40) to 1b. See Table 8−32 for a complete description of

the register contents.

OHCI register offset: 18Ch [ATRQ]

1ACh [ATRS]

1CCh [ARRQ]

1ECh [ARRS]

Default value: XXXX XXXXh

BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESET STATE X X X X X X X X X X X X X X X X

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESET STATE X X X X X X X X X X X X X X X X

Table 8−32. Asynchronous Context Command Pointer Register Description

BIT FIELD NAME TYPE DESCRIPTION

31−4 descriptorAddress RWU Contains the upper 28 bits of the address of a 16-byte aligned descriptor block.

3−0 Z RWU Indicates the number of contiguous descriptors at the address pointed to by the descriptor address.

If Z is 0h, then it indicates that the descriptorAddress field (bits 31−4) is not valid.

Not Recommended for New Designs