Datasheet

1394 OHCI—PCI Configuration Space
119
March 5 2007 − June 2011 SCPS154C
7.12 Subsystem Identification Register
The subsystem identification register is used for system and option card identification purposes. This register
can be initialized from the serial EEPROM or programmed via the subsystem access register at offset F8h
in the PCI configuration space (see Section 7.24, Subsystem Access Register). See Table 7−9 for a complete
description of the register contents.
PCI register offset: 2Ch
Register type: Read/Update
Default value: 0000 0000h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 7−9. Subsystem Identification Register Description
BIT FIELD NAME TYPE DESCRIPTION
31−16† OHCI_SSID RU Subsystem device ID. This field indicates the subsystem device ID.
15−0† OHCI_SSVID RU Subsystem vendor ID. This field indicates the subsystem vendor ID.
†
These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset.
7.13 Power Management Capabilities Pointer Register
The power management capabilities pointer register provides a pointer into the PCI configuration header
where the power-management register block resides. The OHCI controller configuration header doublewords
at offsets 44h and 48h provide the power-management registers. This register is read-only and returns 44h
when read.
PCI register offset: 34h
Register type: Read-only
Default value: 44h
BIT NUMBER 7 6 5 4 3 2 1 0
RESET STATE 0 1 0 0 0 1 0 0
7.14 Interrupt Line and Pin Register
The interrupt line and pin register communicates interrupt line routing information. See Table 7−10 for a
complete description of the register contents.
PCI register offset: 3Ch
Register type: Read/Write
Default value: 0100h
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0
Table 7−10. Interrupt Line and Pin Registers Description
BIT FIELD NAME TYPE DESCRIPTION
15−8 INTR_PIN R Interrupt pin. This field returns 01h when read, indicating that the 1394 OHCI core signals interrupts
on the INTA
terminal.
7−0 INTR_LINE RW Interrupt line. This field is programmed by the system and indicates to software which interrupt line the
OHCI controller INTA
is connected to. The default value for this field is all 00h.
Not Recommended for New Designs