Datasheet

1394 OHCI—PCI Configuration Space
118
March 5 2007 June 2011SCPS154C
7.9 TI Extension Base Address Register
The TI extension base address register is programmed with a base address referencing the memory-mapped
TI extension registers. When BIOS writes all 1s to this register, the value read back is FFFF C000h, indicating
that at least 16K bytes of memory address space are required for the TI registers. See Table 78 for a complete
description of the register contents.
PCI register offset: 14h
Register type: Read/Write, Read-only
Default value: 0000 0000h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 78. TI Base Address Register Description
BIT FIELD NAME TYPE DESCRIPTION
3114 TIREG_PTR RW TI register pointer. This field specifies the upper 18 bits of the 32-bit TI base address register. The
default value for this field is all 0s.
134 TI_SZ R TI register size. This field returns 00 0000 0000b when read, indicating that the TI registers require
a 16K-byte region of memory.
3 TI_PF R TI register prefetch. Bit 3 returns 0b when read, indicating that the TI registers are nonprefetchable.
21 TI_MEMTYPE R TI memory type. This field returns 00b when read, indicating that the TI base address register is
32 bits wide and mapping can be done anywhere in the 32-bit memory space.
0 TI_MEM R TI memory indicator. Bit 0 returns 0b when read, indicating that the TI registers are mapped into
system memory space.
7.10 CIS Base Address Register
The CARDBUS input to the 1394 OHCI core is tied high such that this register returns 0000 0000h when read.
PCI register offset: 18h
Register type: Read-only
Default value: 0000 0000h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
7.11 CIS Pointer Register
The CARDBUS input to the 1394 OHCI core is tied high such that this register returns 0000 0000h when read.
PCI register offset: 28h
Register type: Read-only
Default value: 0000 0000h
BIT NUMBER 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Not Recommended for New Designs