Datasheet

PCI Express Extended Configuration Space
101
March 5 2007 − June 2011 SCPS154C
5.28 Port Arbitration Table (VC1)
The port arbitration table is provided to allow software to define round-robin weighting for traffic entering the
PCI interface. The table is divided into 128 phases. See Table 5−26 for a complete description of the register
contents.
PCI Express extended register offset: 1C0h
– 1FCh
Register type: Read/Write
Default value: 0000 0000h
Table 5−25. Port Arbitration Table
REGISTER FORMAT OFFSET
Phase 7 Phase 6 Phase 5 Phase 4 Phase 3 Phase 2 Phase 1 Phase 0 1C0h
Phase 15 Phase 14 Phase 13 Phase 12 Phase 11 Phase 10 Phase 9 Phase 8 1C4h
Phase 23 Phase 22 Phase 21 Phase 20 Phase 19 Phase 18 Phase 17 Phase 16 1C8h
Phase 31 Phase 30 Phase 29 Phase 28 Phase 27 Phase 26 Phase 25 Phase 24 1CCh
Phase 39 Phase 38 Phase 37 Phase 36 Phase 35 Phase 34 Phase 33 Phase 32 1D0h
Phase 47 Phase 46 Phase 45 Phase 44 Phase 43 Phase 42 Phase 41 Phase 40 1D4h
Phase 55 Phase 54 Phase 53 Phase 52 Phase 51 Phase 50 Phase 49 Phase 48 1D8h
Phase 63 Phase 62 Phase 61 Phase 60 Phase 59 Phase 58 Phase 57 Phase 56 1DCh
Phase 71 Phase 70 Phase 69 Phase 68 Phase 67 Phase 66 Phase 65 Phase 64 1E0h
Phase 79 Phase 78 Phase 77 Phase 76 Phase 75 Phase 74 Phase 73 Phase 72 1E4h
Phase 87 Phase 86 Phase 85 Phase 84 Phase 83 Phase 82 Phase 81 Phase 80 1E8h
Phase 95 Phase 94 Phase 93 Phase 92 Phase 91 Phase 90 Phase 89 Phase 88 1ECh
Phase 103 Phase 102 Phase 101 Phase 100 Phase 99 Phase 98 Phase 97 Phase 96 1F0h
Phase 111 Phase 110 Phase 109 Phase 108 Phase 107 Phase 106 Phase 105 Phase 104 1F4h
Phase 119 Phase 118 Phase 117 Phase 116 Phase 115 Phase 114 Phase 113 Phase 112 1F8h
Phase 127 Phase 126 Phase 125 Phase 124 Phase 123 Phase 122 Phase 121 Phase 120 1FCh
Each phase consists of a four-bit field as indicated below.
BIT NUMBER 3 2 1 0
RESET STATE 0 0 0 0
Table 5−26. Port Arbitration Table Entry Description
BIT FIELD NAME ACCESS DESCRIPTION
3:0 PORT_SELECT RW
Port arbitration select. This 4-bit field is used by software to identify the port ID (secondary PCI
device) that must be allocated to this slot of arbitration bandwidth depending upon the port
arbitration scheme enabled. The default value for this field is 0h.
Not Recommended for New Designs