Datasheet

PCI Express Extended Configuration Space

March 5 2007 − June 2011 SCPS154C

5.23 VC Resource Status Register (VC0)

The VC resource status register allows software to monitor the status of the port arbitration table for this VC.

See Table 5−19 for a complete description of the register contents.

PCI Express extended register offset: 16Ah

Default value: 0000h

BIT NUMBER 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESET STATE 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Table 5−19. VC Resource Status Register (VC0) Description

BIT FIELD NAME ACCESS DESCRIPTION

15:2 RSVD R Reserved. Returns 00 0000 0000 0000b when read.

1 VC_PENDING RU

VC negotiation pending. This bit is asserted when VC negotiation is in progress following

a request by software to enable or disable the VC or at startup for VC0.

0 PORT_TABLE_STATUS RU

Port arbitration table status. This bit is automatically set by hardware when any

modification is made to the port arbitration table entries for this VC within the extended

configuration space. This bit is cleared by hardware after software has requested a port

arbitration table refresh and the refresh has been completed.

Not Recommended for New Designs