Datasheet

Electrical Characteristics
17
June 2006 Revised August 2011 SLLS690C
PARAMETER COMMENTSUNITMAXNOMMINTERMINALS
V
RX–IDLE–DET–DIFFp–p
Electrical idle detect threshold
RXP, RXN 65 175 mV V
RX–IDLE–DET–DIFFp–p
= 2*|V
RXP
− V
RXN
| measured
at the receiver package terminals
T
RX–IDLE–DET–DIFF–ENTER–TIME
Unexpected electrical idle enter
detect threshold integration
time
RXP, RXN 10 ms An unexpected electrical idle (V
RX–DIFFp–p
<
V
RX–IDLE–DET–DIFFp–p
) must be recognized no lon-
ger than T
RX–IDLE–DET–DIFF–ENTER–TIME
to signal an
unexpected idle condition.
NOTES: 9. No test load is necessarily associated with this value.
10. Specified at the measurement point and measured over any 250 consecutive UIs. A test load must be used as the RX device when
taking measurements. If the clocks to the RX and TX are not derived from the same reference clock, the TX UI recovered from
3500 consecutive UI is used as a reference for the eye diagram.
11. A T
RX–EYE
= 0.40 UI provides for a total sum of 0.60 UI deterministic and random jitter budget for the transmitter and interconnect
collected any 250 consecutive UIs. The T
RX–EYE–MEDIAN–to–MAX–JITTER
specification ensures a jitter distribution in which the
median and the maximum deviation from the median is less than half of the total UI jitter budget collected over any 250 consecutive
TX UIs. It must be noted that the median is not the same as the mean. The jitter median describes the point in time where the
number of jitter points on either side is approximately equal, as opposed to the averaged time value. If the clocks to the RX and
TX are not derived from the same reference clock, the TX UI recovered from 3500 consecutive UIs must be used as the reference
for the eye diagram.
12. The receiver input impedance results in a differential return loss greater than or equal to 15 dB with the P line biased to 300 mV
and the N line biased to −300 mV and a common mode return loss greater than or equal to 6 dB (no bias required) over a frequency
range of 50 MHz to 1.25 GHz. This input impedance requirement applies to all valid input levels. The reference impedance for
return loss measurements is 50 Ω to ground for both the P and N line (i.e., as measured by a Vector Network Analyzer with 50–Ω
probes). The use of the series capacitors C
TX
is optional for the return loss measurement.
13. Impedance during all link training status state machine (LTSSM) states. When transitioning from a PCI Express reset to the detect
state (the initial state of the LTSSM), there is a 5–ms transition time before receiver termination values must be met on the
unconfigured lane of a port.
14. The RX dc common mode impedance that exists when no power is present or PCI Express reset is asserted. This helps ensure
that the receiver detect circuit does not falsely assume a receiver is powered on when it is not. This term must be measured at
300 mV above the RX ground.