Datasheet

Electrical Characteristics
13
June 2006 Revised August 2011 SLLS690C
3.3 PCI Express Differential Transmitter Output Ranges
PARAMETER TERMINALS MIN NOM MAX UNIT COMMENTS
UI
Unit interval
TXP, TXN 399.88 400 400.12 ps Each UI is 400 ps ±300 ppm. UI does not account for
SSC−dictated variations.
See Note 4.
V
TX–DIFFp–p
Differential peak–to–
peak output voltage
TXP, TXN 0.8 1.2 V V
TX–DIFFp–p
= 2*|V
TXP
− V
TXN
|
See Note 5.
V
TX–DE–RATIO
De–em-
phasized differential
output voltage (ratio)
TXP, TXN −3.0 −3.5 −4.0 dB This is the ratio of the V
TX–DIFFp–p
of the second and
following bits after a transition divided by the
V
TX–DIFFp–p
of the first bit after a transition.
See Note 5.
T
TX–EYE
Minimum TX eye width
TXP, TXN 0.75 UI The maximum transmitter jitter can be derived as
T
TXMAX– JITTER
= 1 − T
TX–EYE
= 0.3 UI
See Notes 5 and 6.
T
TX–EYE–MEDIAN–to–
MAX–JITTER
Maximum time between
the jitter median and
maximum deviation
from the median
TXP, TXN 0.15 UI Jitter is defined as the measurement variation of the
crossing points (V
TX–DIFFp–p
= 0 V) in relation to recov-
ered TX UI. A recovered TX UI is calculated over 3500
consecutive UIs of sample data. Jitter is measured us-
ing all edges of the 250 consecutive UIs in the center of
the 3500 UIs used for calculating the TX UI.
See Notes 5 and 6.
T
TX–RISE
,
T
TX–FALL
P/N TX output rise/fall
time
TXP, TXN 0.125 UI See Notes 5 and 8.
V
TX–CM–ACp
RMS ac peak common
mode output voltage
TXP, TXN 20 mV V
TX–CM–ACp
= RMS(|V
TXP
+ V
TXN
|/2 – V
TX–CM–DC
)
V
TX–CM–DC
= DC
(avg)
of |V
TXP
+ V
TXN
|/2
See Note 5.
V
TX–CM–DC–ACTIVE–
IDLE–DELTA
Absolute delta of dc
common mode voltage
during L0 and electrical
idle.
TXP, TXN 0 100 mV |V
TX–CM–DC
– V
TX–CM–Idle–DC
| ≤ 100 mV
V
TX–CM–DC
= DC
(avg)
of |V
TXP
+ V
TXN
|/2 [during L0]
V
TX–CM–Idle–DC
= DC
(avg)
of |V
TXP
+ V
TXN
|/2 [during
electrical idle]
See Note 5.
V
TX–CM–DC–LINE–DELTA
Absolute delta of dc
common mode voltage
between P and N
TXP, TXN 0 25 mV |V
TXP–CM–DC
– V
TXN–CM–DC
| ≤ 25 mV when
V
TXP–CM–DC
= DC
(avg)
of |V
TXP
|
V
TXN–CM–DC
= DC
(avg)
of |V
TXN
|
See Note 5.
NOTES: 4. No test load is necessarily associated with this value.
5. Specified at the measurement point into a timing and voltage compliance test load and measured over any 250 consecutive TX
UIs.
6. A T
TX–EYE
= 0.75 UI provides for a total sum of deterministic and random jitter budget of T
TX–JITTER–MAX
= 0.25 UI for the
transmitter collected over any 250 consecutive TX UIs. The T
TX–EYE–MEDIAN–to–MAX–JITTER
specification ensures a jitter
distribution in which the median and the maximum deviation from the median is less than half of the total TX jitter budget collected
over any 250 consecutive TX UIs. It must be noted that the median is not the same as the mean. The jitter median describes the
point in time where the number of jitter points on either side is approximately equal, as opposed to the averaged time value.
7. The transmitter input impedance results in a differential return loss greater than or equal to 12 dB and a common mode return
loss greater than or equal to 6 dB over a frequency range of 50 MHz to 1.25 GHz. This input impedance requirement applies to
all valid input levels. The reference impedance for return loss measurements is 50 Ω to ground for both the P and N lines. Note
that the use of the series capacitors C
TX
is optional for the return loss measurement.
8. Measured between 20% and 80% at transmitter package terminals into a test load for both V
TXP
and V
TXN