Datasheet

SLVL005
o Note that with higher voltage input supplies, such as 5V, power
dissipation in the linear regulator is of greater concern (see previously
presented power dissipation calculations).
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- 3.3V Configuration
o The Spartan-3 FPGA configuration and JTAG ports commonly use signals
with a 2.5-V swing. Alternatively, it is possible to use 3.3-V signals
simply by adding a few external resistors. The 3.3-V signals can cause a
reverse current that flows from certain configurations and JTAG input pins,
through the FPGA, to the V
CCAUX
power rail. Therefore, please refer to
application note SLVA159 http://focus.ti.com/lit/an/slva159a/slva159a.pdf
for implementation guidance.
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