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XILINXPWR-079 (HPA-079)

TPS64203 Switching DC/DC Controller-Based Power Management Solution for

Spartan™-3 Providing up to 3 A from V

= 5.0 V or 3.3 V

SUPPORTS:

Spartan™-3 – supports PR213 at the following link: http://www-

s.ti.com/sc/techlit/slva174.pdf

Spartan™-II - board requires significant modification to support PR211 at the

following link: http://www-s.ti.com/sc/techlit/slva172.pdf

Spartan™-IIE - board requires significant modification to support PR212 at the

following link: http://www-s.ti.com/sc/techlit/slva173.pdf

FEATURES:

Tiny SOT-23 switching DC/DC controller, U2, delivers up to 3 A at low cost.

Easily customizable design allows for maximum cost control by:

o Sizing Q3 for the amount of current up to 3 A to meet the application’s

CCINT

requirement,

o Omitting current sense resistor R4 and connecting ISNS to the drain of Q3,

o Selecting the linear regulator from the TPS79xxx family to meet the

application’s I

CCO

requirement.

In-rush current (for charging decoupling capacitors and FPGA start-up) that

places a demand on the input power supply is minimized by the use of the:

o External supervisory (SVS) IC, U1, which monitors the input rail and

prevents the regulator from enabling until the input bulk capacitors (not

shown in the schematic) are fully charged.

o Integrated soft-start of U2

o Soft-start circuit consisting of the external PMOS transistor Q4 and

supporting passive components to provide 10 ms rise time for V

CCO

o Sequential sequencing of V

CCINT,

CCAUX

then V

CCO

§ the discrete SVS circuit formed by bipolar transistors Q1 and Q2

and supporting passives enables the V

CCAUX

regulator, U3

§ V

CCAUX

enables the V

CCO

regulator, U4

The design meets Xilinx’s V

CCINT

and V

CCO

start-up profile requirements, where

applicable, including monotonic voltage ramp, in-rush current and power voltage

ramp time requirements.

IMPORTANT WEB LINKS:

Link to the TI home page for Xilinx FPGA power management solutions at

http://www.ti.com/xilinxfpga for more information and other reference designs.

Summary of content (6 pages)

PAGE 1
XILINXPWR-079 (HPA-079) TPS64203 Switching DC/DC Controller-Based Power Management Solution for Spartan™-3 Providing up to 3 A from VIN = 5.0 V or 3.3 V SUPPORTS : - Spartan™-3 – supports PR213 at the following link: http://wwws.ti.com/sc/techlit/slva174.pdf - Spartan™-II - board requires significant modification to support PR211 at the following link: http://www-s.ti.com/sc/techlit/slva172.
PAGE 2
- - Link to datasheets at http://focus.ti.com/lit/ds/symlink/tps64203.pdf, http://focus.ti.com/lit/ds/symlink/tps78601.pdf, http://focus.ti.com/lit/ds/symlink/tps79401.pdf, and http://focus.ti.com/lit/ds/symlink/tlc7705.pdf. Link to application note SLVA156 http://focus.ti.com/lit/an/slva156/slva156.pdf for more details on the soft-start circuit. Link to application note SLVA118 http://focus.ti.com/lit/an/slva118/slva118.pdf to explore the thermal considerations when using linear regulators.
PAGE 3
- - the transistor at maximum current (e.g., ICCINTmax *RDSon) does not cause VCCO to fall below its -5% tolerance. o The drain of Q4 needs at least 10 uF of total capacitance in order for the soft-start circuit to work properly. The additional bulk bypass capacitance (not shown in the schematic) required for the VCCO rail of the FPGA will most likely meet this requirement. Layout: The 1.0 uF capacitor, C7, should be placed as close as possible between VDD and GND of the TLC77xx SVS IC.
PAGE 4
+ + +
PAGE 5
Filename: HPA079A_bom.xls Date: 08/17/2004 HPA079A BOM COUNT RefDes C1 1 C10, C11 0 C2, C3, C4, C5 4 C6, C12, C13 3 C7 1 C8 1 C9 1 D1 1 J1 - J8 8 L1 1 Q1, Q2 2 Q3 1 Q4 1 Q5 0 Q6 0 R1, R2, R5, R13 4 R3 1 R4 1 R6 1 R7 1 R8, R11, R14 3 R9, R10, R12, R15, R16 0 S1 1 U1 1 U2 1 1 U3 1 1 U4 -- Notes: Description Capacitor, Ceramic, 22-uF, 10-V, X5R, 10% Capacitor, Ceramic, xx-uF, xx-V Capacitor, Ceramic, 2.2-uF, 6.3-V, X5R, 10% Capacitor, Tantalum, 100-uF, 10-V, 95-milliohm, 20% Capacitor, Ceramic, 0.
PAGE 6
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