Datasheet
VSP3200, 3210
4
SBMS012A
Top View LQFP
PIN DESCRIPTIONS (VSP3200Y)
PIN DESIGNATOR TYPE DESCRIPTION
PIN DESIGNATOR TYPE DESCRIPTION
1 CM AO Common-Mode Voltage
2 REFP AO Upper-Level Reference
3 AGND P Analog Ground
4 AGND P Analog Ground
5 RINP AI Red Channel Analog Input
6 AGND P Analog Ground
7 GINP AI Green Channel Analog Input
8 AGND P Analog Ground
9 BINP AI Blue Channel Analog Input
10 AGND P Analog Ground
11 V
CC
P Analog Power Supply, +5V
12 CLP DI Clamp Enable
HIGH = Enable, LOW = Disable
13 V
CC
P Analog Power Supply, +5V
14 ADCCK DI Clock for A/D Converter Digital Data Output
15 CK1 DI Sample Reference Clock
16 CK2 DI Sample Data Clock
17 AGND P Analog Ground
18 RD DI Read Signal for Registers
19 WRT DI Write Signal for Registers
20 P/S DI Parallel/Serial Port Select
HIGH = Parallel Port, LOW = Serial Port
21 SD DI Serial Data Input
22 SCLK DI Serial Data Shift Clock
23 V
CC
P Analog Power Supply, +5V
24 OE DI Output Enable
25 B0 (D0) LSB DIO A/D Output (Bit 0) and Register Data (D0)
26 B1 (D1) DIO A/D Output (Bit 1) and Register Data (D1)
27 B2 (D2) DIO A/D Output (Bit 2) and Register Data (D2)
28 B3 (D3) DIO A/D Output (Bit 3) and Register Data (D3)
PIN CONFIGURATION
29 B4 (D4) DIO A/D Output (Bit 4) and Register Data (D4)
30 B5 (D5) DIO A/D Output (Bit 5) and Register Data (D5)
31 B6 (D6) DIO A/D Output (Bit 6) and Register Data (D6)
32 B7 (D7) DIO A/D Output (Bit 7) and Register Data (D7)
33 B8 (D8) DIO A/D Output (Bit 8) and Register Data (D8)
B0 LSB DO A/D Output (Bit 0) when Demultiplexed Output Mode
34 B9 (D9) DIO A/D Output (Bit 9) and Register Data (D9)
B1 DO A/D Output (Bit 1) when Demultiplexed Output Mode
35 B10 (A0) DIO A/D Output (Bit 10) and Register Address (A0)
B2 DO A/D Output (Bit 2) when Demultiplexed Output Mode
36 B11 (A1) DIO A/D Output (Bit 11) and Register Address (A1)
B3 DO A/D Output (Bit 3) when Demultiplexed Output Mode
37 B12 (A2) DIO A/D Output (Bit 12) and Register Address (A2)
B4 DO A/D Output (Bit 4) when Demultiplexed Output Mode
38 B13 DO A/D Output (Bit 13)
B5 DO A/D Output (Bit 5) when Demultiplexed Output Mode
39 B14 DO A/D Output (Bit 14)
B6 DO A/D Output (Bit 6) when Demultiplexed Output Mode
40 B15 MSB DO A/D Output (Bit 15)
B7 MSB DO A/D Output (Bit 7) when Demultiplexed Output Mode
41 V
DRV
P Digital Output Driver Power Supply
42 V
CC
P Analog Power Supply, +5V
43 V
CC
P Analog Power Supply, +5V
44 AGND P Analog Ground
45 TP0 AO A/D Converter Input Monitor Pin (single-ended output)
46 V
REF
AIO Reference Voltage Input/Output
INT Ref: Bypass to GND with 0.1µF
EXT Ref: Input Pin for Ref Voltage
47 V
CC
P Analog Power Supply, +5V
48 REFN AO Lower-Level Reference
24
23
22
21
20
19
18
17
16
15
14
13
OE
V
CC
SCLK
SD
P/S
WRT
RD
AGND
CK2
CK1
ADCCK
V
CC
B11 (A1)
B10 (A0)
B9 (D9)
B8 (D8)
B7 (D7)
B6 (D6)
B5 (D5)
B4 (D4)
B3 (D3)
B2 (D2)
B1 (D1)
B0 (D0) LSB
CM
REFP
AGND
AGND
RINP
AGND
GINP
AGND
BINP
AGND
V
CC
CLP
37
38
39
40
41
42
43
44
45
46
47
48
B12 (A2)
B13
B14
B15 (MSB)
V
DRV
V
CC
V
CC
AGND
TP0
V
REF
V
CC
REFN
36 35 34 33 32 31 30
29 28 27 26
1234567891011
25
12
VSP3200Y
Not Recommended for New Designs