Datasheet

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VSP2560
VSP2562
VSP2566
SBES008 –AUGUST 2008 www.ti.com
ELECTRICAL CHARACTERISTICS: VSP2562
All specifications at T
A
= +25°C, all power-supply voltages = +3.0 V, and conversion rate = 36 MHz, no load, unless otherwise
noted.
VSP2562PT
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
RESOLUTION
Resolution 12 Bits
CONVERSION/CLOCK RATE
Conversion/clock rate 36 MHz
ANALOG INPUT (CCDIN)
Input signal level for full-scale out CDS gain = 0 dB, DPGA gain = 0 dB 1000 mV
Maximum input range CDS gain = –3 dB , DPGA gain = 0 dB 1300 mV
Input capacitance 15 pF
Input limit –0.3 3.3 V
TRANSFER CHARACTERISTICS
Differential nonlinearity (DNL) CDS gain = 0 dB, DPGA gain = 0 dB ±0.5 LSB
Integral nonlinearity (INL) CDS gain = 0 dB, DPGA gain = 0 dB ±2 LSB
No missing codes Ensured
Step response settling time Full-scale step input 1 Pixel
Overload recovery time Step input from 1.8 V to 0 V 2 Pixels
Data latency 6 Clock
Grounded input capacitor, PGA gain = 0 dB 76 dB
Signal-to-noise ratio
(1)
Grounded input capacitor, CDS gain = +12 dB 68 dB
CCD offset correction range –200 200 mV
INPUT CLAMP
Clamp on-resistance 400 Ω
Clamp level 1.25 V
PROGRAMMABLE ANALOG FRONT GAIN (CDS)
Minimum gain Gain code = 111 –3 dB
Default gain Gain code = 000 0 dB
Medium gain 1 Gain code = 001 6 dB
Medium gain 2 Gain code = 010 12 dB
Maximum gain Gain code = 011 18 dB
Gain control error 0.5 dB
PROGRAMMABLE DIGITAL GAIN (DPGA)
Programmable gain range –6 26 dB
Gain step 0.032 dB
OPTICAL BLACK CLAMP LOOP
Control DAC resolution 10 Bits
Loop time constant OB loop IDAC is x1 40.7 μs
Programmable range of clamp level 64 312 LSB
Optical black clamp level OBCLP level at code = 01000b 128 LSB
OB level program step 8 LSB
(1) SNR = 20 log (full-scale voltage/rms noise).
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