Datasheet
PRODUCTPREVIEW
SDATA
A0 A9 D0 D5 D0 D5 D0 D5
SCLK
S
LOAD
10-Bit
Address
6-Bit
Data(1)
6-Bit
Data(2)
6-Bit
Data(3)
R
LOAD
Data(1)andData(2)UpdateHere
Not Recommended for New Designs
VSP2560
VSP2562
VSP2566
SBES008 –AUGUST 2008
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Figure 8. Continuous Writing Mode
SERIAL INTERFACE REGISTER DESCRIPTION
The serial interface command data format is shown in Table 5. Descriptions of each register are provided in the
following sections.
Table 5. Serial Interface Data Format
ADDRESS DATA
MSB LSB MSB LSB
REGISTER A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D5 D4 D3 D2 D1 D0
Clk-Pol-Ctrl 0 0 0 0 0 0 0 0 0 0 D5 D4 D3 D2 D1 0
AFE-Ctrl(1) 0 0 0 0 0 0 0 0 0 1 0 D4 D3 D2 D1 D0
AFE-Ctrl(2) 0 0 0 0 0 0 0 0 1 0 D5 0 0 D2 D1 D0
S-Delay 0 0 0 0 0 0 0 0 1 1 0 0 0 D2 D1 D0
Clamp 0 0 0 0 0 0 0 1 0 0 D5 D4 D3 D2 D1 D0
Hot-Pixel 0 0 0 0 0 0 0 1 0 1 D5 D4 D3 D2 D1 D0
D-PGA_L 0 0 0 0 0 0 0 1 1 0 D5 D4 D3 D2 D1 D0
D-PGA_U 0 0 0 0 0 0 0 1 1 1 0 D4 D3 D2 D1 D0
A-PGA 0 0 0 0 0 0 1 0 0 0 0 0 D3 D2 D1 D0
Power 0 0 0 0 0 0 1 0 0 1 D5 D4 D3 D2 D1 D0
DAC A_L 0 0 0 0 0 0 1 0 1 0 D5 D4 D3 D2 D1 D0
DAC A_U 0 0 0 0 0 0 1 0 1 1 0 0 0 D2 D1 D0
DAC B_L 0 0 0 0 0 0 1 1 0 0 D5 D4 D3 D2 D1 D0
DAC B_U 0 0 0 0 0 0 1 1 0 1 0 0 0 D2 D1 D0
Reserved This address is reserved Do not use
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