Datasheet

2VFC32
SPECIFICATIONS
At T
A
= +25°C and V
CC
= ±15V, unless otherwise noted.
✽ Specification the same as VFC32KP.
NOTES: (1) A 25% duty cycle (0.25mA input current) is recommended for best linearity. (2) Adjustable to zero. See Offset and Gain Adjustment section. (3) Linearity error is specified
at any operating frequency from the straight line intersecting 90% of full scale frequency and 0.1% of full scale frequency. See Discussion of Specifications section. Above 200kHz,
it is recommended all grades be operated below +85°C. (4) ±0.015% of FSR for negative inputs shown in Figure 5. Positive inputs are shown in Figure 1. (5) FSR = Full Scale Range
(corresponds to full scale frequency and full scale input voltage). (6) Exclusive of external components’ drift. (7) Positive drift is defined to be increasing frequency with increasing
temperature. (8) For operations above 200kHz up to 500kHz, see Discussion of Specifications and Installation and Operation sections. (9) One pulse of new frequency plus 1µs.
VFC32KP, KU VFC32BM VFC32SM
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
INPUT (V/F CONVERTER) F
OUT
= V
IN
/7.5 R
1
C
1
Voltage Range
(1)
Positive Input >0 +0.25mA ✽✽✽ ✽V
x R
1
Negative Input >0 –10 ✽✽✽ ✽V
Current Range
(1)
>0 +0.25 ✽✽✽ ✽mA
Bias Current
Inverting Input 20 100 ✽✽ ✽✽ nA
Noninverting Input 100 250 ✽✽ ✽✽ nA
Offset Voltage
(2)
14 ✽✽ ✽✽ mV
Differential Impedance 300 || 10 650 || 10 ✽✽ ✽ ✽ kΩ || pF
Common-mode
Impedance 300 || 3 500 || 3 ✽✽ ✽ ✽ MΩ || pF
INPUT (F/V CONVERTER) V
OUT
= 7.5 R
1
C
1
F
IN
Impedance 50 || 10 150 || 10 ✽✽ ✽ ✽ kΩ || pF
Logic “1” +1.0 ✽✽✽ ✽V
Logic “0” –0.05 ✽✽✽ ✽V
Pulse-width Range 0.1 150k/F
MAX
✽✽✽ ✽µs
ACCURACY
Linearity Error
(3)
0.01Hz ≤ Oper
Freq ≤ 10kHz ±0.005 ±0.010
(4)
✽✽ ✽✽% of FSR
(5)
0.1Hz ≤ Oper
Freq ≤ 100kHz ±0.025 ±0.05 ✽✽ ✽✽% of FSR
0.5Hz ≤ Oper
Freq ≤ 500kHz ±0.05 ✽✽% of FSR
Offset Error Input
Offset Votlage
(2)
14 ✽✽ ✽✽ mV
Offset Drift
(6)
±3 ✽✽ppm of FSR/°C
Gain Error
(2)
5 ✽✽% of FSR
Gain Drift
(6)
f = 10kHz ±75 ±50 ±100 ±70 ±150 ppm/°C
Full Scale Drift f = 10kHz ±75 ±50 ±100 ±70 ±150 ppm of FSR/°C
(offset drift and
gain drift)
(6, 7)
Power Supply f = DC, ±V
CC
= 12VDC
Sensitivity to 18VDC ±0.015 ✽✽% of FSR/%
OUTPUT (V/F CONVERTER) (open collector output)
Voltage, Logic “0” I
SINK
= 8mA 0 0.2 0.4 ✽✽✽✽✽✽ V
Leakage Current,
Logic “1” V
O
= 15V 0.01 1.0 ✽✽ ✽✽ µA
Voltage, Logic “1” External Pull-up Resistor
Required (see Figure 4) V
PU
✽✽V
Pulse Width For Best Linearity 0.25/F
MAX
✽✽s
Fall Time I
OUT
= 5mA, C
LOAD
= 500pF 400 ✽✽ns
OUTPUT (F/V CONVERTER) V
OUT
Voltage I
O
≤ 7mA 0 to +10 ✽✽ V
Current V
O
≤ 7VDC +10 ✽✽ mA
Impedance Closed Loop 1 ✽✽Ω
Capacitive Load Without Oscillation 100 ✽✽pF
DYNAMIC RESPONSE
Full Scale Frequency 500
(8)
✽✽ kHz
Dynamic Range 6 ✽✽ decades
Settling Time (V/F) to Specified Linearity
for a Full Scale Input Step
(9)
✽✽
Overload Recovery < 50% Overload
(9)
✽✽
POWER SUPPLY
Rated Voltage ±15 V
Voltage Range ±11 ±20 ✽ V
Quiescent Current ±5.5 ±6.0 ✽✽ ✽ mA
TEMPERATURE RANGE
Specification 0 +70 –25 +85 –55 +125 °C
Operating –25 +85 –55 +125 –55 +125 °C
Storage –25 +85 –65 +150 –65 +150 °C