Datasheet
VFC320
4
SBVS017A
DISCUSSION OF
SPECIFICATIONS
LINEARITY
Linearity is the maximum deviation of the actual transfer
function from a straight line drawn between the end points
(100% full scale input or frequency and 0.1% of full scale
called zero.) Linearity is the most demanding measure of
voltage-to-frequency converter performance, and is a func-
tion of the full scale frequency. Refer to Figure 1 to deter-
mine typical linearity error for your application. Once the
full scale frequency is chosen, the linearity is a function of
operating frequency as it varies between zero and full scale.
Examples for 10kHz full scale are shown in Figure 2. Best
linearity is achieved at lower gains (∆f
OUT
/∆
VIN
) with opera-
tion as close to the chosen full scale frequency as possible
The high linearity of the VFC320 makes the device an
excellent choice for use as the front end of Analog-to-Digital
(A/D) converters with 12- to 14-bit resolution, and for
highly accurate transfer of analog data over long lines in
noisy environments (2-wire digital transmission.)
Figure
Figure
Figure 1. Linearity Error vs Full Scale Frequency.
Figure 2. Linearity Error vs Operating Frequency.
0 2k 4k 6k 8k 10k
Operatin
g
Frequenc
y
(Hz)
0.003
0.002
0.001
0
–0.001
–0.002
–0.003
Typical Linearity jErrorf (% of FSR)
1k 3k 5k 7k 9k
B Grade
C Grade
f
FULL SCALE
= 10kHz
Typical, T
A
= +25°C
FREQUENCY STABILITY VS TEMPERATURE
The full scale frequency drift of the VFC320 versus tem-
perature is expressed as parts per million of full scale range
per °C. As shown in Figure 3, the drift increases above
10kHz. To determine the total accuracy drift over tempera-
ture, the drift coefficients of external components (espe-
cially R
1
and C
1
) must be added to the drift of the VFC320.
RESPONSE
Response of the VFC320 to changes in input signal level is
specified for a full scale step, and is 50ns plus 1 pulse of the
new frequency. For a 10V input signal step with the VFC320
operating at 100kHz full scale, the settling time to within
±0.01% of full scale is 10µs.
THEORY OF OPERATION
The VFC320 monolithic voltage-to-frequency converter pro-
vides a digital pulse train output whose repetition rate is
directly proportional to the analog input voltage. The circuit
shown in Figure 4 is composed of an input amplifier, two
comparators and a flip-flop (forming a on-shot), two switched
current sinks, and an open collector output transistor stage.
Essentially the input amplifier acts as an integrator that
produces a two-part ramp. The first part is a function of the
input voltage, and the second part is dependent on the input
voltage and current sink. When a positive input voltage is
applied at V
IN
, a current will flow through the input resistor,
causing the voltage at V
OUT
to ramp down toward zero,
according to dV/dt = V
IN
/R
1
C
1
. During this time the con-
stant current sink is disabled by the switch. Note, this period
is only dependent on V
IN
and the integrating components.
When the ramp reaches a voltage close to zero, comparator
A sets the flip-flop. This closes the current sink switches as
well as changing f
OUT
from logic 0 to logic 1. The ramp now
begins to ramp up, and 1mA charges through C
1
until V
C1
=
–7.5V. Note this ramp period is dependent on the 1mA
current sink, connected to the negative input of the op amp,
as well as the input voltage. At this –7.5V threshold point
C
1
, comparator B resets the flip-flop, and the ramp voltage
Figure 3. Full Scale Drift vs Full Scale Frequency.
1k 1M
Full Scale Fre
q
uenc
y
(
Hz
)
1000
10
Typical Full Scale Temp Drift
(ppm of FSR/°C)
10k 100k
100
C Grade
B and S Grades
1k 1M
Full Scale Fre
q
uenc
y
(
Hz
)
0.10
0.001
Typical Linearity Error (% of FSR)
10k 100k
0.01
D
FS
= 0.25
T
A
= +25°C