Datasheet

www.ti.com
VCA8500
SBOS390A JANUARY 2008 REVISED MARCH 2008
Table 1. TERMINAL FUNCTIONS (continued)
TERMINAL
PIN NO. NAME I/O DESCRIPTION
19 OUT3 O PGA output channel 3 (inverted)
20 OUT3 O PGA output channel 3
21 OUT2 O PGA output channel 2 (inverted)
22 OUT2 O PGA output channel 2
23 OUT1 O PGA output channel 1 (inverted)
24 OUT1 O PGA output channel 1
25 OUT5 O PGA output channel 5 (inverted)
26 OUT5 O PGA output channel 5
27 OUT6 O PGA output channel 6 (inverted)
28 OUT6 O PGA output channel 6
29 OUT7 O PGA output channel 7 (inverted)
30 OUT7 O PGA output channel 7
31 OUT8 O PGA output channel 8 (inverted)
32 OUT8 O PGA output channel 8
33 AVDD1 +3.3V analog supply
34 V
REFL
Clamp reference level low, 2.0V; bypass with 0.1 µ F capacitor (min)
35 V
REFH
Clamp reference level high, 2.7V; bypass with 0.1 µ F capacitor (min)
36 VB4 Internal bias voltage (+2.4V); bypass with 0.1 µ F capacitor (min)
37 VB6 Internal bias voltage (+2.9V); bypass with 0.1 µ F capacitor (min)
38 VB2 Internal bias voltage (+2.7V); bypass with 0.1 µ F capacitor (min)
39 AVDD2 +5V analog supply (VCA, CW)
40 IN8 I LNA input channel 8
41 VBL8 LNA bias voltage (+2.4V); bypass with 0.1 µ F capacitor (min)
42 IN7 I LNA input channel 7
43 VBL7 LNA bias voltage (+2.4V); bypass with 0.1 µ F capacitor (min)
44 VBL6 I LNA bias voltage (+2.4V); bypass with 0.1 µ F capacitor (min)
45 IN6 LNA input channel 6
46 AVDD1 +3.3V analog supply
47 IN5 I LNA input channel 5
48 VBL5 LNA bias voltage (+2.4V); bypass with 0.1 µ F capacitor (min)
49 PD I Power-down pin for standby mode; 0 = normal operation, 1 = power down
50 CW0 O CW channel 0 current output
51 CW1 O CW channel 1 current output
52 CW2 O CW channel 2 current output
53 CW3 O CW channel 3 current output
54 CW4 O CW channel 4 current output
55 D_IN I Serial data input
56 CLK I Clock input for serial interface
57 D_OUT O Serial data output
58 RST I Reset input; rising edge resets register to default values.
59 DVDD +3.3V digital supply; connect to a low-noise analog supply plane (AVDD1)
60 CW5 CW channel 5 current output
61 CW6 CW channel 6 current output
62 CW7 CW channel 7 current output
63 CW8 CW channel 8 current output
64 CW9 CW channel 9 current output
PowerPAD must be connected to the analog ground of the printed circuit board; use this ground for
GND
bypass capacitor return ground.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): VCA8500