Datasheet

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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
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23
Time (200ns/div)
LNP
Input
(50mV/div)
Differential Output
(500mV/div)
V
CNTL
=0.7V
Figure 67. Before Overload (100mV
PP
Input)
Time (200ns/div)
LNP
Input
(50mV/div)
Differential Output
(500mV/div)
V
CNTL
=0.7V
Figure 68. Approaching Overload (120mV
PP
Input)
POWER-DOWN MODES
When V
DD
(5V) is applied to the VCA2615, the total power
dissipation is typically 308mW. When the power is initially
applied to the VCA2615 with both PDV and PDL pins at a
logic low, the typical power dissipation will be 5mW. After
the VCA2615 has been enabled, if the PDL line is low with
the PDV line high, the typical power dissipation will be
approximately 100mW. After the VCA2615 has been
enabled, if the PDV line is low with the PDL line high, the
typical power dissipation will be approximately 200mW.
Time (200ns/div)
LNP
Input
(100mV/div)
Differential Output
(500mV/div)
V
CNTL
=0.7V
Figure 69. Overload (240mV
PP
Input)
Time (200ns/div)
LNP
Input
(500mV/div)
Differential Output
(1V/div)
V
CNTL
=0.7V
Figure 70. Extreme Overload (2V
PP
Input)