Datasheet

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SBOS316D − JULY 2005 − REVISED OCTOBER 2008
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22
PROGRAMMABLE CLIPPING
The clipping level of the VCA can be programmed to a
desired output. The programming feature is useful when
matching the clipped level from the output of the VCA to
the full-scale range of a subsequent VCA, in order to
prevent the VCA from generating false spectral signals;
see the circuit diagram shown in Figure 66. The signal
node at the drain junction of Q5 and Q6 is sent to the diode
bridge formed by diode-connected transistors, D1 through
D4. The diode bridge output is determined by the current
that flows through transistors Q7 and Q8. The maximum
current that can then flow into the summing node of A2 is
this same current; consequently, the maximum voltage
output of A2 is this same current multiplied by the feedback
resistor associated with A2. The maximum output voltage
of A2, which would be the clipped output, can then be
controlled by adjusting the current that flows through Q7
and Q8; see the circuit diagram shown in Figure 63. The
circuitry of A1, R2, and Q2 converts the clamp voltage
(V
CLMP
) to a current that controls equal and opposite
currents flowing through transistors Q5 and Q6.
When H
/L = 0, the previously described circuitry is
designed so that the value of the V
CLMP
signal is equal to
the peak differential signal developed between +V
OUT
and
−V
OUT
. When H/L = 1, the differential output will be equal
to the clamp voltage. This method of controlled clipping
also achieves fast and clean settling waveforms at the
output of the VCA, as shown in Figure 67 through
Figure 70. The sequence of waveforms demonstrate the
clipping performance during various stages of overload.
The V
CLMP
pin represents a high impedance input
(> 100kΩ).
In a typical application, the VCA2615 will drive an
anti-aliasing filter, which in turn will drive an ADC. Many
modern ADCs, such as the ADS5270, are well-behaved
with as much as 2x overload. This means that the clipping
level of the VCA should be set to overcome the loss in the
filter such that the clipped input to the ADC is just slightly
over the full-scale input. By setting the clipping level in this
manner, the lowest harmonic distortion level will be
achieved without interfering with the overload capability of
the ADC.
Clip Adjust
Input
A1
A2
V
CM
Q2
R
2
V
CLMP
Q1 Q5
V
DD
Q6 Q8
Q7
D1 D2
D3
From
Buffered
Input
D4
Q9
H/L
Output
Amp
R1
R2
Figure 66. Clipping Level Adjust Circuitry