Datasheet

2
www.national.com
USBN9603/USBN9604
Features
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Full-speed USB node device
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Integrated USB transceiver
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Supports 24 MHz oscillator circuit with internal 48
MHz clock generation circuit
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Programmable clock generator
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Serial Interface Engine (SIE) consisting of Physical
Layer Interface (PHY) and Media Access Controller
(MAC), USB Specification 1.0 and 1.1 compliant
●
Control/Status register file
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USB Function Controller with seven FIFO-based End-
points:
— One bidirectional Control Endpoint 0 (8 bytes)
— Three Transmit Endpoints (64 bytes each)
— Three Receive Endpoints (64 bytes each)
●
8-bit parallel interface with two selectable modes:
— Non-multiplexed
— Multiplexed (Intel compatible)
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Enhanced DMA support
— Automatic DMA (ADMA) mode for fully CPU-inde-
pendent transfer of large bulk or ISO packets
— DMA controller, together with the ADMA logic, can
transfer a large block of data in 64-byte packets via
the USB
— Automatic Data PID toggling/checking and NAK
packet recovery (maximum 256x64 bytes of data =
16K bytes)
●
MICROWIRE/PLUS interface
Obsolete