Datasheet

UCD9248
www.ti.com SLVSA33A –JANUARY 2010–REVISED AUGUST 2012
ELECTRICAL CHARACTERISTICS (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ERROR AMPLIFIER INPUTS EAPn, EANn
V
CM
Common mode voltage each pin –0.15 1.848 V
V
ERROR
Internal error voltage range AFE_GAIN field of CLA_GAINS = 0
(1)
–256 248 mV
EAP-EAN Error voltage digital resolution AFE_GAIN field of CLA_GAINS= 3 1 mV
R
EA
Input Impedance Ground reference 0.5 1.5 3 MΩ
I
OFFSET
Input offset current 1 kΩ source impedence –5 5 µA
Vref 10-bit DAC
V
ref
Reference voltage setpoint 0 1.6 V
V
refres
Reference voltage resolution 1.56 mV
ANALOG INPUTS CS-1A, CS-1B, CS-2A, CS-2B, CS-3A, CS-3B, CS-4A, CS-4B, Vin/I
in
, TEMP, ADDR-0, ADDR-1, Vtrack, ADCref
V
ADDR_OPEN
Voltage indicating open pin ADDR-0, ADDR-1 open 2.37 V
V
ADDR_SHORT
Voltage indicating shorted pin ADDR-0, ADDR-1 short to ground 0.36 V
Inputs: Vin/I
in
, Vtrack, Temp, CS-1A, CS-1B,
V
ADC_RANGE
Measurement range for voltage monitoring 0 2.5 V
CS-2A, CS-2B CS-3A, CS-3B, CS-4A, CS-4B
Over-current comparator threshold voltage
V
OC_THRS
Inputs: CS-1A, CS-2A, CS-3A, CS-4A 0.032 2 V
range
(2)
Over-current comparator threshold voltage
V
OC_RES
Inputs: CS-1A, CS-2A, CS-3A, CS-4A 31.25 mV
range
ADCref External reference input 1.8 V
33A
V
Temp
internal
Int. temperature sense accuracy Over range from 0°C to 125°C –5 5 °C
INL ADC integral nonlinearity –2.5 2.5 mV
I
lkg
Input leakage current 3V applied to pin 100 nA
R
IN
Input impedance Ground reference 8 MΩ
C
IN
Current Sense Input capacitance 10 pF
DIGITAL INPUTS/OUTPUTS
Dgnd
V
OL
Low-level output voltage I
OL
= 6 mA
(3)
, V
33DIO
= 3 V V
+0.25
V
33DIO
V
OH
High-level output voltage I
OH
= -6 mA
(4)
, V
33DIO
= 3 V V
–0.6V
V
IH
High-level input voltage V
33DIO
= 3V 2.1 3.6 V
V
IL
Low-level input voltage V
33DIO
= 3.5 V 1.4 V
SYSTEM PERFORMANCE
V
RESET
Voltage where device comes out of reset V
33D
Pin 2.3 2.4 V
t
RESET
Pulse width needed for reset nRESET pin 2 µs
V
ref
commanded to be 1V, at 25°C,
V
RefAcc
Setpoint reference accuracy –10 10 mV
AFEgain = 4, 1V input to EAP/N measured at
output of the EADC
(5)
Setpoint reference accuracy over temperature –40°C to 125°C –20 20 mV
V
DiffOffset
Differential offset between gain settings AFEgain = 4 compared to AFEgain = 1, 2, or 8 –4 4 mV
240 + 1
t
Delay
Digital compensator delay 240 switching ns
cycle
F
SW
Switching frequency 15.260 2000 kHz
Duty Max and Min duty cycle 0% 100%
V
33
Slew Minimum V
33
slew rate during power on V
33
slew rate between 2.3V and 2.9V 0.25 V/ms
t
retention
Retention of configuration parameters T
J
= 25°C 100 Years
Write_Cycles Number of nonvolatile erase/write cycles T
J
= 25°C 20 K cycles
(1) See the UCD92xx PMBus Command Reference for the description of the AFE_GAIN field of CLA_GAINS command.
(2) Can be disabled by setting to '0'
(3) The maximum I
OL
, for all outputs combined, should not exceed 12 mA to hold the maximum voltage drop specified.
(4) The maximum I
OH
, for all outputs combined, should not exceed 48 mA to hold the maximum voltage drop specified.
(5) With default device calibration. PMBus calibration can be used to improve the regulation tolerance
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