Datasheet

UCD9248

www.ti.com

SLVSA33A –JANUARY 2010–REVISED AUGUST 2012

Table 5. Temperature Sensor Mapping

TEMPERATURE MUX INPUT POWER STAGE

A0 DPWM-1A

A1 DPWM-1B

A2 DPWM-3A

A3 DPWM-2A

A4 DPWM-2B

A5 DPWM-4A

A6 n/c

A7 n/c

Temperature Balancing

Temperature balancing between phases is performed by adjusting the current such that cooler phases draw a

larger share of the current. Temperature balancing occurs slowly (the loop runs at a 10 Hz rate), and only when

the phase currents exceeds the PMBus settable TEMP_BALANCE_IMIN. This minimum current threshold

prevents the controller from "winding up" and forcing one phase to carry all the current under a low-load

condition, when the total current may be insufficient to significantly affect phase temperatures.

Soft Start, Soft Stop Ramp Sequence

The UCD9248 performs soft start and soft stop ramps under closed loop control.

Performing a start or stop ramp or tracking is considered a separate operational mode. The other operational

modes are normal regulation and light load regulation. Each operational mode can be configured to have an

independent loop gain and compensation. Each set of loop gain coefficients is called a "bank" and is configured

using the CLA_GAINS PMBus command.

Start ramps are performed by waiting for the configured start delay TON_DELAY and then ramp the internal

reference toward the commanded reference voltage at the rate specified by the TON_RISE time and

VOUT_COMMAND. The DPWM and SRE outputs are enabled when the internal ramp reference equals the

preexisting voltage (pre-bias) on the output and the calculated DPWM pulse width exceeds the pulse width

specified by DRIVER_MIN_PULSE. This ensures that a constant ramp rate is maintained, and that the ramp is

completed at the same time it would be if there were not a pre-bias condition.

Figure 13 shows the operation of soft-start ramps and soft-stop ramps.

Figure 13. Start and Stop Ramps