Datasheet
VrefDAC
CPU
V
EA
V
EAP
V
ead
PMBus
V
EAN
Vref = 1.563 mV/LSB
G
AFE
= 1, 2, 4, or 8
G
eADC
= 8 mV/LSB
6-bit
result
EADC
VrefDAC
VOUT_MARGIN_HIGH
VOUT_CAL_OFFSET
VOUT_MARGIN_LOW
VOUT_COMMAND
+
Limiter
VOUT_
SCALE_
LOOP
OPERATION
Command
VOUT_MAX
3:1
Mux
UCD9248
www.ti.com
SLVSA33A –JANUARY 2010–REVISED AUGUST 2012
Figure 7. PMBus Voltage Adjustment Methods
For a complete description of the commands supported by the UCD9248 see the UCD92xx PMBUS Command
Reference. Each of these commands can also be issued from the Texas Instruments Fusion Digital Power™
Designer program. This Graphical User Interface (GUI) PC program issues the appropriate commands to
configure the UCD9248 device.
Calibration
To optimize the operation of the UCD9248, PMBus commands are supplied to enable fine calibration of output
voltage, output current, and temperature measurements. The supported commands and related calibration
formulas may be found in the UCD92xx PMBUS Command Reference.
Analog Front End (AFE)
Figure 8. Analog Front End Block Diagram
The UCD9248 senses the power supply output voltage differentially through the EAP and EAN pins. The error
amplifier utilizes a switched capacitor topology that provides a wide common mode range for the output voltage
sense signals. The fully differential nature of the error amplifier also ensures low offset performance.
The output voltage is sampled at a programmable time (set by the EADC_SAMPLE_TRIGGER PMBus
command). When the differential input voltage is sampled, the voltage is captured in internal capacitors and then
transferred to the error amplifier where the value is subtracted from the set-point reference which is generated by
the 10-bit Vref DAC as shown in Figure 8. The resulting error voltage is then amplified by a programmable gain
circuit before the error voltage is converted to a digital value by the error ADC (EADC). This programmable gain
is configured through the PMBus and affects the dynamic range and resolution of the sensed error voltage as
shown in Table 3.
Table 3. Analog Front End Resolution
AFE_GAIN for EFFECTIVE ADC RESOLUTION DIGITAL ERROR VOLTAGE
AFE GAIN
PMBus COMMAND (mV) DYNAMIC RANGE (mV)
0 1 8 –256 to 248
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