Datasheet

UCD9248

www.ti.com

SLVSA33A –JANUARY 2010–REVISED AUGUST 2012

Table 1. PMBus Address Bins (continued)

PMBus

PMBus RESISTANCE

PMBus ADDRESS

(kΩ)

5 86.6

4 75

3 64.9

2 56.2

1 48.7

0 42.2

short –

A low impedance (short) on either address pin that produces a voltage below the minimum voltage causes the

PMBus address to default to address 126. A high impedance (open) on either address pin that produces a

voltage above the maximum voltage also causes the PMBus address to default to address 126.

Some addresses should be avoid, see Table 2.

Table 2. PMBus Address Assignment Rules

ADDRESS STATUS REASON

0 Prohibited SMBus generall address call

1-10 Avaliable

11 Avoid Causes confilcts with other devices during program flash updates.

12 Prohibited PMBus alert response protocol

13–125 Avaliable

126 Avoid Default value; may cause conflicts with other devices.

127 Prohibited Used by TI manufacturing for device tests.

JTAG Interface

The JTAG interface can provide an alternate interface for programming the device. It is enabled by default on the

UCD9248.

Bias Supply Generator (Shunt Regulator Controller)

Internally, the circuits in the UCD9248 require 3.3V to operate. This can be provided directly on the V33x pins, or

it can be generated from the power supply input voltage using an internal shunt regulator and an external

transistor. The requirements for the external transistor are that it be an NPN device with a beta of at least 40.

Figure 6 shows the typical application using the external series pass transistor. The base of the transistor is

driven by a 10kΩ resistor to Vin and a transconduction amplifier whose output is on the VD33FB pin. The NPN

emitter becomes the 3.3 V supply for the chip and requires bypass capacitors of 0.1µF and 4.7µF.

The transconductance amplifier sinks current into the V33FB pin, in order to regulate the amount of current

allowed into the base of the transistor, which regulates the collector current, which determines the emitter voltage

(3.3V). The resistor value should be sized low enough to give sufficient base drive at minimum input voltage, yet

large enough to not exceed the maximum current sink capability of the V33FB pin at maximum input voltage.

Higher beta transistors help in increasing the minimum resistance value, as less base current is needed to

sufficiently drive the higher beta transistor. A resistor value of 10 kΩ works well for most applications that use the

FCX491A BJT.

Some circuits in the device require 1.8V that is generated internally from the 3.3V supply. This voltage requires a

0.1 µF to 1 µF bypass capacitor from BPCap to ground.