Datasheet

Addr Cmd Data PEC
ACK ACK ACK ACK
Start Stop
PMBus Clock
PMBus Data
V
OUT
T
MSGVO
T
MSG
T
VO
UCD9244
www.ti.com SLVSAL6A –NOVEMBER 2010–REVISED FEBRUARY 2011
Figure 8. PMBus Timing for VID_CODE_RAILn Command
Table 4. Typical PMBus Timing for VID_CODE_RAILn Command @ 400kHz
SYMBOL PARAMETER CONDITIONS TYP UNITS
T
msgPEC
Message Transmit Time, with PEC 400 kHz clock, PEC enabled 162 – 256
µs
Message Transmit Time, without PEC 400 kHz clock, PEC enabled 126 – 221
T
vo
End of message until Vout starts changing 28 – 140 µs
T
msgvo
Start of message until Vout start changing 400 kHz clock, PEC disabled 169 – 314 µs
The total time to transmit the serial VID command will vary depending on the other tasks that the UCD92xx
processor is performing. Typical packet times varied from 162 to 256µs when the PMBus is configured for a 400
kb/s transfer rate running and the optional PEC byte is enabled. Disabling the PEC byte saves about 35µs and
the transfer times are from 126 to 221µs. Note that these are not specified best-case/worst-case timings, but
indicate a range given the typical acknowledge overhead in the host and controller.
After the VID packet has been received by the controller there is a delay before the set-point reference DAC is
updated. This delay time varies from ~28µs to 140µs (typical ) depending on the existing priority of updating
set-point reference DAC when the command is received.
With a 221µs packet transfer time, it would seem possible to send 4500 VID messages per second to the device.
Very short bursts at this rate might be acceptable, but doing so for sustained periods could overwhelm the
available processing resources in the UCD92xx, causing it to be delayed in performing its other monitoring and
fault response tasks. In addition, if multiple hosts are trying to talk on the PMBus at such high rates then bus
contention will occur with great regularity.
To prevent these issues, it is prudent to limit the total VID messaging rate to less than 4 messages per
millisecond. In a system with four independent hosts, each host might need to be limited to less than 1 message
per millisecond. Therefore, to minimize PMBus traffic, it is best to only issue the VID command when a voltage
change is required. There is no benefit to sending the same VID code continuously and repeatedly.
JTAG Interface
The JTAG interface can provide an alternate interface for programming the device. Four of the JTAG pins on the
UD9244 (TMS, TDI, TDO, and TCK) are shared with other functions (VID4A, VID4B, VID4C, and Syncln). JTAG
is disabled by default. There are three conditions under which the JTAG interface is enabled:
1. When the ROM_MODE PMBus command is issued.
2. On power-up if the Data Flash is blank. This allows JTAG to be used for writing the configuration parameters
to a programmed device with no PMBus interaction.
3. When an invalid address is detected at power-up. By opening or shorting one of the address pins to ground,
an invalid address can be generated that enables JTAG.
When the JTAG port is enabled the shared pins are not available for use as Syncln or VID pins.
If JTAG is to be used, an external mechanism such as jumpers or a mux must be used to prevent conflict
between JTAG and the Syncln or VID pins.
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