Datasheet

+Vout
-Vout
R1
R2
EAP
EAN
C2
Rin
Ioff
P
1
P
2
EA
OUT
R
R
K
R
R
1 K
V
where K VOUT_SCALE_LOOP
V
=
=
-
= @
SW P
1
C2
2 0.35 F R
=
p´ ´ ´
2 1 2
EA OUT OFFSET
1 2 1 2
1 2 1 2
EA EA
R R R
V V I
R R R R
R R R R
R R
= +
æ ö æ ö
+ + + +
ç ÷ ç ÷
è ø è ø
UCD9222
SLVSAL7A –NOVEMBER 2010– REVISED FEBRUARY 2011 www.ti.com
The differential feedback error voltage is defined as V
EA
= V
EAP
– V
EAN
. An attenuator network using resistors R1
and R2 (Figure 12) should be used to ensure that V
EA
does not exceed the maximum value of Vref when
operating at the commanded voltage level. The commanded voltage level is determined by the PMBus settings
described in the Output Voltage Adjustment section.
Figure 12. Input Offset Equivalent Circuit
Voltage Sense Filtering
Conditioning should be provided on the EAP and EAN signals. Figure 12 shows a divider network between the
output voltage and the voltage sense input to the controller. The resistor divider is used to bring the output
voltage within the dynamic range of the controller. When no attenuation is needed, R2 can be left open and the
signal conditioned by the low-pass filter formed by R1 and C2.
As with any power supply system, maximize the accuracy of the output voltage by sensing the voltage directly
across an output capacitor as close to the load as possible. Route the positive and negative differential sense
signals as a balanced pair of traces or as a twisted pair cable back to the controller. Put the divider network close
to the controller. This ensures that there is low impedance driving the differential voltage sense signal from the
voltage rail output back to the controller. The resistance of the divider network is a trade-off between power loss
and minimizing interference susceptibility. A parallel resistance (R
p
) of 1kΩ to 4kΩ is a good compromise. Once
RP is chosen, R1 and R2 can be determined from the following formulas.
(2)
It is recommended that a capacitor be placed across the lower resistor of the divider network. This acts as an
additional pole in the compensation and as an anti-alias filter for the EADC. To be effective as an anti-alias filter,
the corner frequency should be 35% to 40% of the switching frequency. Then the capacitor is calculated as:
(3)
To obtain the best possible accuracy, the input resistance and offset current on the device should be considered
when calculating the gain of a voltage divider between the output voltage and the EA sense inputs of the
UCD9222. The input resistance and input offset current are specified in the parametric tables in this datasheet.
V
EA
= V
EAP
– V
EAN
in the equation below.
(4)
The effect of the offset current can be reduced by making the resistance of the divider network low.
20 Submit Documentation Feedback © 2010–2011, Texas Instruments Incorporated
Product Folder Link(s) :UCD9222