Datasheet
UCD9081
23
24
11
10
12
13
14
EN1
EN2
EN3
EN4
EN5
EN6
EN7
21
22
1
SDA
SCL
6
7
8
18
19
9
15
30
VCC
VSS
MON1
MON2
MON3
MON4
MON5
MON6
MON7
26
25
10kW
10kW
EN
EN
EN
3.3V
3.3V
3.3V
16
MON8
28
27
2
17
NC
NC
32
5
ROSC
RST
3
XIN
29
TEST
20
31
NC
NC
4 NC
10kW
100kW
3.3V
3.3V
3.3V
0.01 Fm
3.3V
3.3V
3.3V
DNP
10kW
3.3V
1kW
10kW
3.3V
DNP
10kW
3.3V
1kW
10kW
POR1
3.3V
POR2
POR3
POR4
*
*
*
EX:SlaveI C Address=0x65
(Internal ADDR[7:5]=0b110)
2
I C
Master
2
3.3V
Regulator
V
RTN
BUS
V
BUS
1 Fm
System
Device
Resets
V
OUT1
V
OUT2
V
OUT3
Power
Supply
1
Power
Supply
2
Power
Supply
3
EN
V
OUTX
Power
Supply
X
EN8/
ADDR1/
G PO1
ADDR3/
G PO3
ADDR2/
G PO2
ADDR4/
G PO4
330W
Status
LEDs
UCD9081
www.ti.com
SLVS813B –JUNE 2008–REVISED DECEMBER 2010
APPLICATION INFORMATION
TYPICAL APPLICATION DIAGRAM
Figure 12 illustrates a typical power supply sequencing configuration. Power Supply 1 and Power Supply X
require active low enables while Power Supply 2 and Power Supply 3 require active high enables. V
OUT1
and
V
OUT3
exceed the selected A/D reference voltage so their outputs are divided before being sampled by the MON1
and MON3 inputs. V
OUT2
and V
OUTX
are within the selected A/D reference voltage so their outputs can be
sampled directly by the MON2 and MON7 inputs. Figure 12 illustrates the use of the GPO digital output pins to
provide status and power on reset to other system devices.
Figure 12. Typical Power Supply Sequencing Application
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