Datasheet
S
SDA
SCL
SPSr
t
r
t
SU;STO
t
BUF
t
HD;STA
t
SU;STA
t
r
t
HIGH
t
HD;DAT
t
SU;DAT
t
HD;STA
t
LOW
t
f
t
of
UCD9081
SLVS813B –JUNE 2008–REVISED DECEMBER 2010
www.ti.com
I
2
C TIMING
The UCD9081 supports the same timing parameters as standard-mode I
2
C. See the following timing diagram
and timing parameters for more information.
Figure 11. Timing Diagram for I
2
C Interface
TIMING PARAMETERS FOR I
2
C INTERFACE
PARAMETER MIN MAX UNIT
t
of
Output fall time from V
OH
to V
OL
(1)
with a bus capacitance from 10 pF to 400 pF. 250
(2)
ns
C
I
Capacitance for each pin. 10 pF
f
SCL
SCL clock frequency 10 100 kHz
t
HD;STA
Hold time (repeated) START condition. After this period, the first clock pulse is generated. 4 ms
t
HD;DAT
Data hold time 0
(3)
3.45
(4)
ms
t
LOW
LOW period of the SCL clock 4.7 ms
t
HIGH
HIGH period of the SCL clock 4 ms
t
SU;STA
Set-up time for repeated start condition 4.7 ms
t
SU;DAT
Data set-up time 250 ns
t
r
Rise time of both SDA and SCL signals 1000 ns
t
f
Fall time of both SDA and SCL signals 300 ns
t
SU;STO
Set-up time for STOP condition 4 ms
t
BUF
Bus free time between a STOP and START condition 4.7 ms
C
(b)
Capacitive load for each bus line 400 pF
V
nL
Noise margin at the LOW level for each connected device (including hysteresis) 0.1 VDD V
V
nH
Noise margin at the HIGH level for each connected device (including hysteresis) 0.2 VDD V
(1) See the Electrical Characteristics section of this data sheet.
(2) The maximum t
f
for the SDA and SCL bus lines (300 ns) is longer than the specified maximum t
of
for the output stages (250 ns). This
allows series protection resistors, R
s
, to be connected between the SDA/SCL pins and the SDA/SCL bus lines without exceeding the
maximum specified t
f
.
(3) A device must internally provide a hold time of at least 300 ns for the SDA signal to bridge the undefined region of the falling edge of
SCL.
(4) The maximum t
HD;DAT
must only be met if the device does not stretch the LOW period (t
LOW
) of the SCL signal.
The UCD9081 is compatible with 3.3-V IO ports of microcontrollers, TMS320™ DSP family as well as ASICs.
The UCD9081 is available in a plastic 32-pin QFN package (RHB).
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