Datasheet

I2CWrite:
FLASHLOCK=
UNLOCK(0x02)
I2CWrite:
WADDR=
0xE000
I2CWrite:
WDATA =
0xBADC
I2CWrite:
WADDR=
0xE000
I2CWrite:
WDATA =
Data(16b)
I2CWrite:
WDATA =
Data(16b)
I2CWrite:
FLASHLOCK=
LOCK(0x00)
. . .
Upto16times (32bytes)
-OR-
Repeatas necessary withWADDRupdated
towrite512bytes
UCD9081
www.ti.com SLVS813B –JUNE 2008–REVISED DECEMBER 2010
CONFIGURING THE UCD9081
The UCD9081 has many different configurable parameters such as sequencing options, alarm processing
options, and rail dependencies. A Microsoft™ Windows™ GUI is available for selecting and generating the
necessary configuration parameters. To download and install the UCD9081 GUI, see the UCD9081 product
folder at http://focus.ti.com/docs/prod/folders/print/ucd9081.html. See the UCD9081 EVM User's Guide (TI
literature number SLVU249) for details on installing and using the GUI. Once the user-specific configuration
parameters are selected, the GUI generates a hex file that can be loaded into the flash memory of the UCD9081
via the I
2
C interface.
NOTE
Since loading a new configuration requires writing to FLASH memory, the UCD9081 will
not monitor the MONx inputs while the configuration parameters are being updated.
NOTE
The enable and digital I/O pins of the UCD9081 are in a high impedance state when the
device is not configured (state in which the device is in when delivered from Texas
Instruments).
To download the configuration parameters generated by the GUI into the UCD9081, a contiguous block of
configuration information is sent to the device via the I
2
C interface. This block is 512 bytes long and starts at
address 0xE000.
This 512-byte block of configuration information is sent to the device in multiple segments. The segment size can
range from 2 to 32 bytes at one time, and must be a multiple of 2 bytes. That is, a master can send 256 2-byte
segments or 32 16-byte segments, and so on. All the segments must be sent back-to-back in the proper
sequence, and this operation must be completed by sending the last segment so that the last byte of the
512-byte block is written. If this is not done, the UCD9081 is in an unknown state and does not function as
designed.
The process for sending the configuration information to the UCD9081 is as shown in Figure 7:
Figure 7. Configuration Information
As shown in Figure 7, the process for updating the configuration of the UCD9081 is as follows:
1. Unlock flash memory by writing the value 0x02 to the FLASHLOCK register
2. Write the address of the configuration section of memory (WADDR = 0xE000)
3. Write the constant 0xBADC to update memory (WDATA = 0xBADC)
4. Write the address of the configuration section of memory again (WADDR = 0xE000)
5. Write the data (WDATA = <varies>). Repeat steps 4 and 5 as necessary, depending on the data segment
size used, to write 512 bytes. Increment the address as necessary.
6. Lock flash memory after the last byte of the last segment is written by writing the value 0x00 to the
FLASHLOCK register
At the conclusion of this process, the configuration of the UCD9081 is updated with the configuration changes, as
represented by the values from the data segments. See the UCD9081 Programming Guide (SLVA275) for more
details on programming the UCD9081.
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